לוח משרות דרושים, לחיפוש זה נמצאו 508 משרות

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in EMIR CAD to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As a Physical Design Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will continuously develop the Electro-Migration and IR Drop (EMIR) flow, working closely at the intersection of Physical Design, Analog/Mixed-Signal design, and Package Engineering.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) flow
Implement and maintain robust EMIR flows and methodologies using industry-standard tools (Ansys RedHawk-SC, Cadence Voltus, or equivalent)
Collaborate closely with Analog/SerDes designers to integrate current profiles and ensure robust power delivery to sensitive high-speed IP blocks
Partner with Package Design engineers to perform Chip-Package-System (CPS) co-analysis flow
Understand root-cause analysis for voltage drop violations and EM risks
Support silicon bring-up by correlating simulation results with actual silicon measurements and yield data.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters.
As a Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow-you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Physical Implementation & Execution
Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards
Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS)
Own macro-level implementation with deep hands-on experience in floorplanning and complex routing
Signoff & Design Integrity
Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Ensure first-pass silicon success through rigorous signoff flows and analysis
Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness
Methodology Development & Cross-Functional Collaboration
Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation
Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity
Leverage scripting and automation to make engineering environment faster and more robust.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip
Collaborate closely with Physical Design team to insure a full power integrity
Be responsible on IR architecture for timing convergence
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM)
Understand root-cause analysis for voltage drop violations and EM risks
Be responsible and go-to person for any IR related issues.

Our Networking Division is looking for an excellent Verification and Validation System Product Engineer! Our Networking Division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data Center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, big data, and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.

What you'll be doing:

Define test strategy

Design, implement, and execute validation plans for the infrastructure system.

Write efficient, maintainable, and high-quality unit tests for new features and existing codebases

Automate infrastructure testing processes to improve validation efficiency.

Identify potential bottlenecks, vulnerabilities, and failure points within the infrastructure and recommend corrective actions.

Enhance validation efficiency through continuous monitoring and optimization.

Troubleshooting and streamline/optimize our testing procedures.

We are looking for an experienced Embedded Software Engineer to join our team and develop advanced software for complex airborne and ground-based electro-optical systems.
In this role, you will work on real-time embedded software, image and video processing, sensor integration, and system-level capabilities. You will collaborate closely with software, algorithms, hardware, validation, and system engineering teams throughout the development lifecycle, from concept and implementation to integration and field testing.
Responsibilities
Develop and optimize software for real-time embedded systems.
Design, develop, and debug software using C++ and Java.
Work in Linux/UNIX embedded environments.
Integrate cameras, IMU sensors, LIDAR, and additional peripherals.
Contribute to image processing, video analysis, and computer vision capabilities.
Investigate system issues, perform debugging, and optimize performance.
Participate in system integration, validation activities, and field testing.
Collaborate with multidisciplinary development teams.

we are seeking a highly motivated and experienced Senior Software Engineer for a position focused on developing innovative network device monitoring and visualization solution.
Meet the Team:
This position is part of Silicon One organization, based in Israel. Silicon One is the foundation of industry-leading networking hardware products, pushing the boundaries of technology and driving the next generation of high-performance, scalable solutions.
Your Impact:
Design and develop visualization capabilities within our SDK environment
Lead the development of a brand-new comprehensive self-monitoring system for network devices from the ground up
Implement a comprehensive model for capturing and managing network state information
Drive cross-team collaboration and technical strategy
Work closely with senior technical leadership
Create and refine technical requirements and system designs
Build new systems and frameworks from the ground up

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.

As a Senior RTL Verification Engineer, you will lead the verification of complex subsystems and architectural features within a next-generation, high-performance RISC‑V Application Processor. You will work closely with architecture, design, modeling, software, validation, and implementation teams to ensure first-pass silicon success while meeting aggressive performance, power, and area (PPA) targets.

In this role, you will drive verification strategy, methodology, and execution from specification through tape-out, providing technical leadership in the definition of scalable verification environments, coverage closure plans, and debug methodologies. You will be expected to independently own large verification domains, influence design and architecture decisions, and mentor junior engineers.

The ideal candidate has extensive experience in CPU or SoC verification, with strong expertise in one or more of the following areas: RISC‑V architecture, CPU microarchitecture, MMU, memory hierarchy, cache coherence, interconnects, and micro-controller verification.

Responsibilities

Lead verification efforts for complex CPU and SoC subsystems from architecture definition through tape-out.

Define comprehensive verification strategies, test plans, coverage models, and closure criteria.

Architect, develop, and maintain advanced UVM-based verification environments and reusable verification components.

Drive verification execution, including stimulus development, functional coverage closure, assertions, regressions, and debug.

Collaborate closely with architecture and design teams to review specifications, identify ambiguities, and ensure verifiability.

Develop constrained-random, directed, and scenario-based tests to validate functional correctness and corner cases.

Drive root-cause analysis and resolution of complex design and verification issues.

Define and implement verification methodologies that improve scalability, quality, and productivity across the project.

Work with software, modeling, performance, and validation teams to develop system-level verification solutions.

Analyze verification metrics and risks, proactively driving closure plans to achieve project milestones.

Mentor junior verification engineers and contribute to the technical growth of the team.

Contribute to DV methodology discussions and influence verification best practices across the organization.

We are looking for a highly skilled SW developer Expert with substantial Embedded RT and Object-Oriented development experience in a multi-disciplinary environment to join our R&D group in Israel (Rehovot).
You will be a part of a talented software team that is currently developing the next generation of 3D printers, using cutting-edge technology and constantly looking for new ideas and improvements.
What you will be doing:
Lead development tasks through all stages - gathering requirements, designing, implementing (mostly using C, C++ and C#) and following integration on the 3D printers themselves.
Work closely with System and HW engineers, SW developers, QA and many more.
Perform design and code reviews
Constant collaboration and knowledge sharing with the SW team.

As a Package Engineer, you will work closely with SI, layout, and ASIC design teams to develop complex, top-of-the-line ASIC packages. You will be responsible for planning schedules, resolving costs, packaging, manufacturing, and electrical design issues.

What you will be doing:

Leading development of cutting-edge microelectronics packaging of our Networking Business Units future products, evaluating our products for reliability and performance.

Review manufacturability readiness at each milestone.

Work with world leading vendors to develop highly challenging packaging solutions.

Leading the development of groundbreaking microelectronics packaging for our Networking Business Unit's future products.

Collaborating with world-leading vendors to develop highly ambitious packaging solutions.

Thriving in a dynamic and challenging environment.

Join and lead task forces to investigate and support production excursions, failure analysis and reliability issues and establish quality standards.

Monitor substrate and assembly production KPIs and collaborate with cross functional teams to define and monitor Yield Improvement Plans for continuous improvement and establish quality standards.

Lead process changes reviews, prepare and present data in Change Control Board meetings, lead technical reviews of product changes throughout the supply chain.

we are looking for a ASIC Engineer.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab

we are looking for a Senior Physical Design Engineer.
Your Impact:
You'll be part of the team, which is at the heart of software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

BIRD Aerosystems is a global leader in the development of advanced airborne defense, intelligence, and surveillance solutions for military, governmental, and commercial aviation. Our innovative systems are deployed worldwide, supporting mission-critical operations and providing advanced technological solutions for the aerospace and defense industries. As we continue to grow, we are looking for an experienced Electrical Practical Engineer / Electronics Technician to join our Production Lab team and take part in the assembly, testing, and delivery process of our advanced products. What You’ll Do • Assemble and test company products throughout the entire production lifecycle – from receiving KITs from the warehouse to final delivery to customers. • Perform electrical and mechanical assemblies according to engineering drawings and assembly instructions. • Conduct ATP (Acceptance Test Procedures) and product testing. • Operate laboratory testing equipment and perform troubleshooting activities. • Support product integration, testing, and production processes. • Perform fault analysis and support repairs of electronic assemblies. • Lead products through the manufacturing process and maintain all required product documentation. • Work on multiple projects simultaneously while maintaining quality and delivery timelines. • Collaborate with engineering, production, and multidisciplinary teams.

Our Algorithm Research & Development team operates at the cutting edge of Cyber over RF (CRF) - a unique and multidisciplinary field that blends signal processing, RF experimentation, physics-based modelling, and cyber research.
We work end-to-end: from early-stage research and concept development, through algorithm design and simulation, all the way to lab prototypes and real-world field testing. Its hands-on, intellectually demanding, and incredibly rewarding.
Were looking for a passionate engineer with a strong foundation in signal processing and an appetite for solving complex, real-world problems.