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about the job
our company's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. the hardware testing engineering team ensures that this cutting-edge equipment is reliable. in the r&d lab, you design TEST equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our company's standards of quality and reliability.
the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
design, develop, and maintain cad tools and scripts to automate and streamline design tasks, verification processes, and data analysis.
administer and optimize the Front-End compute environment, ensuring reliability, performance, and scalability.
provide Technical Support and training to design and verification teams on the use of cad tools, scripts, and the compute environment.
identify opportunities to enhance Front-End development workflows, implement improvements, and document best practices.
work closely with design, verification, and cad teams to understand their needs, gather requirements, and deliver effective solutions.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
in this role, you will use application-specific integrated circuit (asic) design experience to be part of a team that develops complex asic system -on-chip ( SOC ) intellectual property from proof-of-concept to production. this includes creating ip level microarchitecture definitions, register-transfer level (rtl) coding and all rtl quality checks. you will also have the opportunity to contribute to design flow and methodologies, including design generation automation. you will collaborate with members of architecture, software, verification, power, timing, synthesis design for testing etc. you will develop/define design options for performance, power and area.the ml, systems, & cloud ai (msca) organization at our designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our services (search, youtube, etc.) and cloud. our end users are, cloud customers and the billions of people who use services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define the ip microarchitecture level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
perform rtl development (coding and debug in verilog, systemverilog).
conduct function/performance simulation debug and lint/cdc/fv/upf checks.
engage in synthesis, timing/power closure, and asic silicon bring-up.
contribute to verification TEST plan and coverage analysis of block and SOC -level.

physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

our group is a distinguished collective dedicated to seeding advanced and unparalleled technologies, including video engines, streaming, time synchronization, and more. our primary mission is to research, invent, chart the technological course, and architect both the algorithms and the hardware required to bring these innovations to fruition.
we are on the hunt for a  software engineer  who brings on board extensive experience across relevant software domains and is passionate about innovation. this is a golden opportunity to make your contribution to developing innovative technologies designed for integration into our elite consumer and data center products. as a part of our team, you will play an active role in patenting new knowledge and safeguarding our intellectual property.
join us in pioneering the data center technologies of the future!
what you'll be doing: build and maintain Python -based tools, workflows, and frameworks used by algorithm and architecture teams.
lead and mentor engineers in software development, performance optimization, and workflow guidelines. 
define and improve development environments across Linux, containers, build flows, and internal compute systems.
integrate algorithmic and architectural developments into production software (sdk, umd, and occasionally bare-metal firmware).
work hands-on with C / C ++ and low-level components to ensure smooth integration with hardware and system architecture.

we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. we offer amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work.
What you'll be doing in this position:
* Design and implement Smart Energy management solutions that connect smart devices using advanced and emerging protocols, ensuring exceptional performance, robust security, and seamless scalability.
* Collaborate with system Engineers and Software Architects to deliver well-structured, high-quality software aligned with the teams roadmap.
* Develop and maintain high-quality code following best practices, while performing peer reviews to ensure consistency, reliability, and maintainability.
* Work in a hardware-oriented environment, including integration with physical devices, troubleshooting complex setups, and validating software-hardware interactions
* Apply AI-driven tools and methodologies to accelerate development and enhance code quality.
* Work across multiple Embedded Linux platforms, contributing to complex system -level development and integration tasks.
Country:
Israel
City:
Herzliya

The System Integrator is in charge of assembly & integration of the products subsystems, while integrating its applications to the system, deploy unit and system level experiments and tests.
We are seeking a skilled System Integration Engineer to join our dynamic team. As a key member responsible for integrating various components of our multidisciplinary product, you will be ensuring seamless collaboration between hardware and software elements.
Key Responsibilities
In this role, you will
Design and implement system integration for combining diverse hardware and software components into a cohesive product.
Collaborate with cross-functional teams to understand product requirements and specifications.
Develop and execute test plans to validate the functionality and performance of integrated systems.
Troubleshoot and resolve issues related to system integration, ensuring timely and effective solutions.
Interface with hardware and software teams to facilitate communication and streamline integration processes.
Document integration procedures, configurations, and troubleshooting steps for future reference.
Conduct risk assessments and implement mitigation strategies to minimize integration challenges.
Code and run test scripts (mainly Python).
Testing of multi-disciplinary systems
Maintaining the devices, analyze problems and repair.

our company has continuously reinvented itself over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. nvidia is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. this is our lifes work, to amplify human creativity and intelligence!
we are looking for a senior signal & power integrity engineer. we work closely with our sites in usa and china and have access to extensive knowledge, technologies and tools. yet we are responsible for our own product line of phy ics. taking the products from concepting, through design, implementation, verification and release to customers. if you thrive working with highly skilled people that enjoy reaching challenging goals then nvidia in might be the perfect workplace for you. this is a dynamic team working with state of the art, unique technology. if you are someone that loves a challenge, come join this diverse team and help move the needle!
what you'll be doing:
design high frequencies channels up to 400gb/s per lane for pcbs, packages, connectors and cables.
design layout guidelines for our systems.
simulate passive and active elements in 3d and 2d simulation tools
measure systems in the lab using network analyzer, tdr and scope
master infiniband, ethernet and pci-ex layer 1 specifications and implementation methods
work in an intense environment and control multi-discipline expertise

Senior Integration Engineer Power the Future with us! At our company, we're a global leader in smart energy technology, with over 3,000 employees, offices in 20+ countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. our company  offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. The Integration Engineer will develop, perform and analyze system Validation tests and will take part in the system review processes, with an understanding of the market requirement, system design, and the end users expectations. What will you be doing?
* E2E responsibilities for our company system, and product validation and experiments.
* Plan and execute HW & SW system integration tests.
* Understand and study the system operation edges, and system design edges.
* Plan and design manual and script automation tests of our company Product

Country:
Israel
City:
Herzliya

Are you looking for a great opportunity to further your career? we are investing in the rapid growth area of Hardware Assisted Verification (HAV).
Our most successful multi-national customers are using our company HAV platforms to verify some of the worlds most advanced System on Chip (SoC) designs. HAV solutions are expanding to a wider audience of smaller companies who are benefiting from early software development and ultra-fast hardware verification through hosted services.
we are looking to hire a Senior Consultant with either Emulation or FPGA prototyping knowledge and experience. This role is ideally suited to someone with a good understanding of HAV platforms who can guide customers through successful HAV deployment and design validation. This is a great opportunity to work with some of the most interesting and innovative people and companies across the semiconductor industry.
The consultant role will be mainly focused on technical services delivery. This could range from platform enablement to methodology guidance. Interactions may be direct with the customer or collaborative through a wider technical team. This position will require a combination of remote, office and onsite working. As a consultant, you will also be expected to uncover opportunities, scope engagements, promote offerings, and grow new business.
Key Responsibilities
A good understanding of HAV platforms and infrastructure (e.g. Strato, Primo or proFPGA enterprise-level systems would be preferable)
A good understanding of HAV compilation and runtime flows (e.g. Veloce or VPS would be preferable)
Practical insights into the application and usage of HAV
Knowledge of design mapping, testbench mapping and pre-silicon validation
Familiarity with HAV debug solutions (probes, waveforms, assertions, coverage, etc.)
Knowledge of virtual TestBench eXpress (TBX) and/or In-Circuit Emulation (ICE) use-cases
Proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification
Strong background in functional verification, RTL synthesis, design partitioning and place-and-route
Conversant with SoC design and architecture concepts.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a design team manager within the server chip design team, you will use your asic design experience to be part of a team that creates the SOC vlsi design cycle from start to finish. you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.in this role, you will oversee the intellectual property (ip) and SOC vlsi design cycle from architecture to production. you will own and manage ip, subsystems and SOC development, leading a group of designers and design tech leads. you will be responsible for mentoring and developing team members and tech leads, driving improvements in leadership, technical execution, and design flows.the ai and infrastructure team is redefining whats possible. we empower our customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include , cloud customers, and billions of our users worldwide. we're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our cloud, global networking, data center operations, systems research, and much more.
responsibilities
manage a team of tech leads and designers. develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
lead design activities at ips, subsystems, and system -on-chips (socs).
plan, execute, track progress, assure quality, and report status of the assigned activity.
work closely with internal customers and support multiple activities and deliverables.
assure and manage deliverables quality at all rtl design categories including reviews, static checks, design for physical design, power, etc.

about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers our company's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a SOC vision architect in our companys silicon team, you will be at the heart of defining the hardware that powers the next-generation of our companys products. you will bridge the gap between ai research and physical silicon, architecting the image signal processor (isp), codecs and the pixel data path. you will deliver unparalleled image quality while staying within the tight power, performance, and area (ppa) constraints. you will participate in the concept, architecture, documentation, and implementation of a new product.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity.our companycloud customers, and billions of our company users worldwide.we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
define a flexible imaging pipeline hardware architecture, from the sensor interface (e.g., mobile industry processor interface (mipi)) through the isp, the encoder/decoder, scaling and memory output.
partner with our company research to transform advanced computational imaging algorithms into high-efficiency hardware logic.
conduct trade-off analyses between power, performance, and silicon area to meet thermal envelopes and current limitations.
influence external executive vendor roadmaps, ensuring deep co-optimization between their future products and our company's custom silicon.
lead collaboration across architecture, register-transfer level (rtl), physical design and validation teams.

our company is looking for an excellent software Developer whos passionate about networking, encryption and virtualization to join the cloud networking r&d team. we are seeking an experienced engineer who is deeply technical, hands-on, and has a wide system view. you will work on our innovative virtual switch which use nivida doca sdk for accelerated packet processing using our superior connectx nics and bluefield dpus. we are looking to grow our teams with the most resourceful people in the world. if you're creative and autonomous, we want to hear from you!
what youll be doing:
design and implement new features to accelerate network and Storage
develop pioneering virtual switch which use our hw offload capabilities.
driving a complete engineering process, including refining requirements, engineering design of data structures/algorithms, implementation, peer review, Developer testing, and post-ga support.
drive sophisticated technical issues to closure that may occur in the cross-team boundary.

we are a leading semiconductor design center, developing SoCs, microcontrollers, and security hardware solutions for tier-1 customers in the computing and server space. As a self-contained R&D center - spanning architecture, chip design, software, and system engineering - we work closely with major US-based OEMs to deliver innovative, semi-custom silicon solutions. We are now extending our portfolio into AI acceleration, developing a next-generation NPU platform aimed at efficient, real-world AI deployment.
?Shape the Future of AI at the Silicon Level We are looking for a visionary Senior Technical Manager to build and lead our AI software stack for our next-generation NPU platform This is a rare opportunity to own the full software layer - from compiler infrastructure to Developer ecosystem - and make a lasting impact on how AI runs on silicon. What You'll Do; Build and lead a highly skilled AI software & algorithms engineering team, establishing engineering standards, development processes, and technical direction Define the end-to-end stack - compiler, runtime, Kernel libraries, and SDK - enabling efficient AI deployment on our NPU Drive AI compiler development using technologies like MLIR, TVM, LLVM or similar infrastructures to translate PyTorch/TensorFlow models into optimized NPU execution Champion model optimization - quantization, pruning, and hardware-aware techniques for maximum performance and power efficiency on the accelerator. Runtime, Drivers, and Firmware Integration - scheduling, memory management, and low-level software for AI workloads on-chip AI Kernel Libraries - Guide the development of highly optimized neural network Kernel libraries and performance-critical primitives tailored to the architecture of the NPU. Developer Ecosystem - Define and deliver the SDK, APIs, and development tools that allow internal teams and external developers to deploy AI models easily on the platform. Cross-Functional Architecture Collaboration - Work closely with silicon architecture and hardware design teams to ensure optimal hardware-software co-design, providing feedback on architecture, performance bottlenecks, and future ISA requirements.

we are looking for a creative and independent senior TEST engineer. nvidia networking unit has continuously reinvented itself over two decades. our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. today, nvidia is increasingly known as the place for getting end-to-end high-speed ethernet and infiniband solutions we're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. we need a creative individual who will help transfer network silicon ics products (switch, nic, smartnic) from design engineering to mass production.
you will be exposed to various aspects of design, dft and TEST of nvidia network ic products, and will be responsible for definition and development of tests from wafer level to final TEST of network-ics. in addition, your responsibilities will include working with overseas manufacturing teams to increase yields, TEST coverage and capacity, and reduce production costs. if you are passionate about enabling of the highest quality network products that will change the world, we want to hear from you!
what you'll be doing:
ic TEST definition & development
write, execute and debug fw code
manage failure analysis of field and production failures
provide dft recommendations to the design teams
build expertise on production of network products

we are seeking an experienced QA Engineer to join our sw/fw testing team. this position will be part of our growing team, which enables nvidia products to meet the industry-leading benchmarks of efficiency and quality. we develop a collaborative and inclusive work environment, where ideas are shared and innovation is encouraged. as a QA Engineer in this group, you will be immersed in the latest advancements and actively contribute to developing world-class products. your efforts will directly impact the performance and quality of our offerings, ensuring they consistently meet industry-leading standards. we are looking for an ideal candidate with proven QA experience who will be actively involved in testing industry-leading features in the networking sector, can acquire new feature knowledge, conduct both manual and automated tests, and contribute to the development of automation systems. the ideal candidate should bring a robust understanding for sw release cycle and the QA part in it.
what you'll be doing:
review arch design and requirements documents for new features introduced in several domains like infiniband and ethernet switches and nics, nvidia gpus, nvlink, linkx and more
design, develop, and perform tests for the new features, as part of fw ga or update releases
automate newly added tests in the existing automation framework, and add new capabilities and features to the framework
report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by r&d team, and raise if not fixed
conduct tests in various areas, including regression, performance, functional, and security. keep track of testing progress and generate summary reports of testing activities
fully collaborate with different external teams like:: Product Marketing, r&d, and verification.
define and build setups topologies for appropriate product coverage
nvidia is committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.