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At our company, what you do matters. Every day, we protect over 100,000 organizations worldwide from increasingly sophisticated cyber and AI-driven threats, securing their AI transformation.
Our prevention-first approach safeguards hybrid networks, cloud environments, digital workspaces, and AI systems, stopping attacks before they happen.
This is where innovation meets real-world impact. Youll help customers across industries operate with confidence in a rapidly changing digital world, working alongside smart, curious people who take ownership, challenge assumptions, and solve complex problems.
Were proud to be recognized by TIME, Newsweek, and Forbes for excellence and workplace culture.
What really sets our company apart is the opportunity to grow, contribute, and help companies navigate their AI transformation securely.
If youre excited to work at the forefront of AI-driven security on a global scale, this is the place to do it.
Key Responsibilities
We are seeking a talented and driven Hardware Project Manager to join our innovative team. In this key role, you will lead the development of groundbreaking hardware projects, guiding them from concept to mass production while navigating the dynamic landscape of technology and cybersecurity.
At our company, we value creativity and collaboration, and we are committed to fostering an environment where your ideas can thrive. As part of a global leader in cybersecurity, you will play a vital role in shaping the future of our products and services.
Join us in our mission to secure the future!
Lead developing new hardware projects, ensuring timely progression from concept to mass production.
Manage strategic relationships with customers, ensuring their needs are met throughout the project lifecycle.
Define project requirements and specifications (Design/SRS) for new initiatives.
Coordinate prototype hardware builds (EVT, DVT, PVT) in collaboration with our contract manufacturer.
Manage software release processes, drawing on proven experience in software project management.
Develop and maintain project schedules, identifying critical paths and addressing bottlenecks to ensure smooth execution.
Collaborate on engineering deliverables, including specifications, test plans, reliability testing, and engineering validation.
Conduct audits and manage quality control for production carried out by ODMs.
Communicate the impact of scope changes to all stakeholders, including customers, regarding cost, timing, and quality implications.
Provide regular updates on program statuses, highlighting potential risks and setbacks, and developing mitigation strategies.
Offer basic debugging support for hardware issues.
Collaborate with customers and partners to address field issues and technical inquiries.

Were looking for an L2 IT Technician with Project Management experience to support and maintain large-scale GPU clusters in a data center environment. We are seeking an experienced IT Hardware Support Engineer with a focus on IT Projects and relevant activities. This role aims to provide not only support in troubleshooting of high-performance server hardware, including GPU clusters, but also implementations of additional infrastructure components on production sites.

Apart from being involved in resolution of complex hardware incidents, proactive handling of L1/L2 support via the ticketing system, you will work in collaboration with the Technical Project Manager. This role expects from candidates to have advanced technical experience in pair with some project management experience allowing to move the projects further, identify specific risks, participate in implementation with support of 3rd parties.

Your responsibilities will include
Solve hardware related issues with servers, involving in-depth advanced level troubleshooting

Report to hardware problem management, execute workarounds and solutions

Solve proactively L1/L2 tasks through ticket system

Update new processes and documentation for IT hardware team

Collaborate with Technical Project Manager on current projects

Participate in technical projects implementations

Oversee 3rd party contractor activities during project implementations

Basic level of network tasks, troubleshooting and support

Required CPU Design for Test Engineer, Cloud
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency,
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

Required Design Verification Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will be a part of the Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/Universal Verification Methodology (UVM) or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.
As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.
Key Responsibilities
Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market
System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently
Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies.

We are expanding our System Validation Group and invite you to explore Space with us!

Outstanding opportunity to be part of a super-cutting-edge team working on systems above and beyond the globe in our company.


What you will be doing​:

Writing system validation Test plans , Design and develop Test programs to validated embedded system features and performance.

Conducting System Validation Test cycles to verify systems based on HW (analog and Digital), RF, SW, FW

Experience with Python or C programing, Git or other programming languages & source control.

Strong technical troubleshooting.

Develop tools and utilities for Lab & field testing, feature analysis.

High debug capabilities when work with the Software, systems, HW teams on complex issues.

Ability to move fast and decisiveness.

Building development environment.

Designing automate tests.

E2E ownership product from kickoff to production.

We are looking for an experienced system engineer to participate and lead the development of a radio-based drone detection and mitigation system as part of the company products.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication
protocols.
Develop and optimize algorithms for scanning, signal separation, antenna selection, etc.
Define requirements and guide other multi-disciplinary teams (SW, Modem algorithms, DSP, and FPGA) through
implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including
radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like
MATLAB, Python, Excel, and other log analysis software.
Gain a deep understanding of the full system to guide and support development, testing and validation teams.

We are looking for a Senior Product Engineer to join a global team of a Product Engineers that own a technical success and customer satisfaction across multiple high-impact projects. This role is deeply rooted in data analytics; youll be working at the intersection of silicon, systems, and software to deliver high-value insights to customers.

Responsibilities
Performing post-silicon and system-level data analysis and providing insights on data extracted from post-silicon stages.
Supporting customers with analytics platform problems solving and new features introduction.
Drive integration of proteanTecs analytics platform within customer environments, bridging silicon, test, and system-level domains.
Collaborate with R&D and data science teams to develop, validate, and improve advanced analytics algorithms.
Troubleshoot complex silicon/system issues through data-driven insights.
Partner with internal stakeholders (design, software, product) to influence roadmap and execution.
Act as a technical professional in customer onboarding, support, and ongoing engagement.

We are looking for a talented Development Engineer to join our team and take part in building innovative software solutions in a dynamic and challenging environment.

Location: Ramat Hachayal, Tel Aviv. Hybrid option once a week.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design Engineer specializing in SoC EMIR to join our local engineering powerhouse from the ground up.
This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As an EMIR Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.
You will be responsible for SoC EMIR Analysis to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.
Key Responsibilities
Take responsibility on IR drop analysis and signal/power electromigration (EM) of very complex chip
Collaborate closely with Physical Design team to insure a full power integrity
Partner with Package Design engineers to perform Chip-Package co-analysis (CPM)
Understand root-cause analysis for voltage drop violations and EM risks.

We are looking for a creative and independent Test Engineer with hands-on experience in digital test content development (ATPG, LBIST, MBIST).Our high-speed networking products are industry leaders, continually redefining speed, bandwidth, and reliability across generations.

In this role, you will be responsible for developing, validating, and supporting digital test content for NVIDIAs advanced Network Silicon ICs (Switches, NICs, SmartNICs). You will work closely with DFT, design, and test engineering teams to ensure high-quality and scalable test content from wafer to final product.

What you'll be doing:

Develop ATPG, LBIST, and MBIST content based on DFT architecture.

Run validation flows (simulation/emulation/silicon), analyze failures, and debug pattern issues.

Collaborate with DFT teams to ensure alignment between test logic and content implementation.

Support test program bring-up and pattern integration on production testers.

Continuously improve coverage, pattern quality, and pattern generation efficiency.

Work with product and test engineering to support yield improvement and debug activities.

we are looking for a Logic Design Engineer.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

We develop cutting-edge technology in Silicon Photonics, revolutionizing connectivity and communication in data centres. Silicon photonics is becoming a standard technology used for high-performance systems, solving challenges of performance, integration, power and cost. This technology is growing rapidly also in other markets such as Healthcare, LIDARs and other sensors. We are looking to solve difficult problems, smartly and simply, by thinking out of the box, leveraging the knowledge and know-how of the team members and working as a team to create Magic. Our Company culture is characterized by accountability for our ethics and for being fair to every employee, customer, supplier, and partner. We believe we must work hard and have fun on the way to success. We are looking for a Photonics Layout Engineer to join our integrated photonics design team. This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design. In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules. You will work closely with device designers, process engineers and tape-out teams to deliver high-quality layouts of silicon photonics PICs. Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software. Understanding of photonic components, waveguide routing and automated layout generation is a major advantage. You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.
Responsibilities:
o Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software. o Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.). o Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths. o Verify layouts using DRC, and LVS to ensure compliance with foundry requirements. o Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts. o Optimize layouts for performance, yield, and compactness while adhering to technology constraints. o Participate in photonic design automation tool development and workflow improvements. o Prepare and manage data for tape-out and support mask review processes. o Debug layout and rule-check issues and propose corrective actions.

We are looking for a Real-Time Embedded DSP Software Engineer to join the development of state-of-the-art automotive imaging radar technology.
Our vision is to bring new and cutting-edge automotive radar sensor solutions, while leveraging our assets and expertise in this field. Introducing best in class Radar sensor that would complement our end-to-end autonomous driving solution platform
You will be part of a winning team in a fast-paced startup-like environment, working on many different components of the entire system. You will have an opportunity to make an impact on the design and implementation of an innovative technology in its early stages.
What will your job look like?
Design, build and optimize software modules for production grade imaging-radar solution
Implement complex algorithms in a multi-core platform with high bandwidth with distributed memory
Work closely with algorithms teams to convert complex MATLAB code to efficient real-time environment.
Plan memory arrangement, data transfers and pipelining of computation, to maximize DSP utilization.