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We are looking for a program manager with technical skills for HW R&D organization, responsible for programs and project on various Network products. The PM will drive execution and scheduling of HW projects while aligning with corporate priorities and constraints.

What you'll be doing:

Responsibility to coordinate between all project stakeholders such as marketing, engineering teams, operations etc. from initial requirements definition through delivery.

Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.

Responsibility for developing and implementing HW methodologies and Project management processes and tools.

We are looking for an experienced Electronics Engineer / Practical Electronics Engineer to join our multidisciplinary R&D team and support the development of advanced electro-optical systems.
In this role, you will be responsible for electronic board bring-up, debugging, repair, testing, calibration, and system integration. You will work closely with electrical, mechanical, and system engineers throughout the product lifecycle, from early prototypes to production and deployment.
This position is ideal for someone who enjoys practical engineering work, solving complex hardware issues, and working on mission-critical technologies in a dynamic development environment.
Responsibilities:
Perform bring-up, debugging, validation, and repair of electronic boards for advanced electro-optical systems.
Troubleshoot analog, digital, power, and communication interfaces using oscilloscopes and other laboratory equipment.
Perform board-level modifications, rework, repairs, and validation according to engineering requirements.
Work closely with hardware design engineers to investigate failures, improve designs, and resolve technical issues.
Support PCB manufacturers and assembly partners throughout production, troubleshooting, and quality processes.
Execute and support environmental testing of electronic boards and electro-optical systems.
Collaborate with mechanical engineers on system integration, thermal considerations, cable routing, and assembly optimization.
Develop, document, and perform calibration procedures for electro-optical systems.
Document test results, failure analysis, corrective actions, and engineering activities.
Support continuous improvement of laboratory processes, production readiness, and engineering workflows.

you will join a multidisciplinary team developing and qualifying advanced embedded solutions for application processors, security processors (Caliptra, TrustZone/OPTEE), and embedded I/O processors.

Our customers include Tier-1 enterprise server vendors and leading cloud service providers.



Responsibilities:

Lead a team of experienced system and validation engineers, including hands-on involvement.
Define and execute validation strategies for complex SoC products across pre- and post-silicon stages.
Collaborate closely with HW, Embedded SW, Architecture, and Security teams to ensure full system coverage.
Analyze product requirements and define comprehensive validation plans and methodologies.
Develop and maintain validation environments, including test frameworks, automation, and infrastructure.
Drive debug and root-cause analysis of system-level issues across HW/SW boundaries.
Ensure high-quality validation coverage and sign-off aligned with product and customer requirements.
Support pre-silicon activities (emulation, FPGA) and post-silicon bring-up and system validation.
Drive continuous improvements in validation processes, tools, and productivity.
Mentor and support team members in technical growth and execution excellence.
Participate in recruitment and onboarding of new team members.

We're looking for exceptional engineers to join our Signal/Power-Integrity and Packaging team. A team that sits where the Silicon meets the Board, bridging the gap between what happens internally at the DIE and the overall system interconnect and the external memories and peer devices.
What sets us apart:
Small team, yet a one stop shop for IP electrical integration at the DIE level, Package design, SI/PI simulations, Layout, Board-design and advanced lab characterization.
Combining Signal-Integrity and Layout, to come up with optimized Package and PCB designs.
Holistic view of the entire interconnect, from the DIEs metals, through the Package, to the PCB traces, and all the way to the peer device.
In-depth post-silicon characterization, using advanced measurement techniques, far exceeding traditional compliance measurements.
Deep dive mentality, in both theory and the bolts and nuts that make the internal circuitry of the electrical interfaces.

The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Labs Chip development team.
The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
The teams work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGAs substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes.

As a SIP team member, you will assume responsibility for all electrical aspects of physical interfaces of advanced I/Os, PLL, Memory and SerDes interfaces, from integration at the Die level, through SI/PI simulation and package layout, to reference board design aspects.

This position is for an experienced engineer with strong background in high-speed electrical interfaces, such as DRAM, PCIe, Ethernet SerDeses. The line of work is multi-disciplinary, combining Package-Design, Back-End integration of electrical IPs, SI/PI extractions & simulations.


Key job responsibilities
Deep dive into electrical IPs, integrated into the DIE;
I/O ring design and close work with Backend team on floor-planning all I/O interfaces at the DIE level.
Lead test studies of Die bump-out arrangements and Package substrate breakout.
Lead layout test studies of package pin-out arrangements and PCB board breakout.
Design large and complex package substrates.
Carry advanced SI/PI extractions and simulations to validate the design from the silicon to the peer device at the board level.

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.

Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.

Requirements
Responsibilities:

Develop compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.

We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence. Make the choice to join us today.

What youll be doing:

Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units in our company (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.

Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.

You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.

Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.

We are looking for you! Joining our team, you will have the opportunity to excel and develop brand new switch products for one of the world's leading companies! We are seeking an experienced Software Engineer to join the Networking Switch SW group, developing the switch Operating System (NVOS). Key role in developing the NVOS is critical for our next-gen networking tech for HPC data centers. Are you passionate about working on innovative technologies? Then we want to hear from you!

What you'll be doing:

Owning and leading the NVOS including development, testing flow and product life cycle.

As a Senior Software Engineer, you will use your expertise in C++ and Python to develop NVOS features and support new products.

Lead NVOS integrations with FW, hardware, and production teams.

Support internal and external customers for any NVOS related items.

Required Junior AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will join a high-performing Research and Development team dedicated to delivering high-quality silicon. You will partner with cross-functional technical teams throughout the full development lifecycle, taking ownership of quality assurance strategies from the initial concept through final tape-out.
Responsibilities
Plan digital design block verification by analyzing specifications and identifying critical scenarios with design engineers.
Create and enhance constrained-random environments using SystemVerilog and Universal Verification Methodology (UVM), or execute formal verification using SystemVerilog Assertions (SVA) and industry-leading tools.
Identify and write all types of coverage measures for corner-cases.
Debug test failures alongside design teams to ensure block correctness.
Analyze metrics to resolve coverage gaps and drive progress toward tape-out.

As we expand our presence in Israel, we're seeking a visionary System Validation Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.


Job Description
The mission of this role is to perform system validation for our highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more.

You will be part of the site located at Israel (Haifa - Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your journey in our company.

As we expand our presence in Israel, we're seeking a visionary DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy
Be part of the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards
Design and implement DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG for high-end devices

Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance
Drive test coverage and quality metrics to meet stringent manufacturing requirements

Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR
Participate in developing and maintaining cutting-edge DFT implementation flows
Automate and improve methodologies using advanced scripting and tools

In this role, you will design, optimize and develop features in the simulator.
Simulators are used daily by our architecture, algorithms, system, VLSI and QA teams - and by our company customers running the most advanced AI networks on our processors.
The development language is C/C++ (OOP) on Linux and Windows platforms.
Responsibilities:
Design and develop simulation software for our companys NPU and DSP platforms within an agile, top-notch software organization.
Perform in-depth analysis and optimization of simulator performance and accuracy across multiple our company processor architectures.
Dive into a large existing codebase to debug and deliver clever solutions to complex software challenges.
Interact and engage with architecture, algorithms, system, VLSI and QA teams, including remote design centers.

Join a world-class product management organization as a Technical Product Engineer, playing a pivotal role in delivering deep technical expertise to partners, customers, and internal teams. You will act as a strategic advisor, driving valuable insights and feedback from the field directly into our product development cycle. By experimenting with new technologies and addressing complex sales challenges, you will ensure our solutions remain at the forefront of the industry. Work cross-functionally to shape the future of our continuous security platform and accelerate time-to-value for enterprise SOCs.
Key Responsibilities
Work cross-functionally with sales, product management, and customer teams to support innovation and execution.
Coordinate and lead multi-departmental projects to drive alignment and deliver impactful business outcomes.
Partner with Product Managers to provide feedback based on customer needs, field insights, and product gaps.
Drive cloud-native security innovation for the modern SOC by identifying and enabling high-value use cases.
Design and deliver technical content for cloud security platforms, including integrations, guides, and automation.
Create high-quality enablement materials to help customers and partners adopt, integrate, and scale security solutions.

Required Technical Product Engineer (Cortex)
Job Summary:
Join a world-class product management organization as a Technical Product Engineer, playing a pivotal role in delivering deep technical expertise to partners, customers, and internal teams. You will act as a strategic advisor, driving valuable insights and feedback from the field directly into our product development cycle. By experimenting with new technologies and addressing complex sales challenges, you will ensure our solutions remain at the forefront of the industry. Work cross-functionally to shape the future of our continuous security platform and accelerate time-to-value for enterprise SOCs.
Key Responsibilities:
Work cross-functionally with sales, product management, and customer teams to support innovation and execution.
Coordinate and lead multi-departmental projects to drive alignment and deliver impactful business outcomes.
Partner with Product Managers to provide feedback based on customer needs, field insights, and product gaps.
Drive cloud-native security innovation for the modern SOC by identifying and enabling high-value use cases.
Design and deliver technical content for cloud security platforms, including integrations, guides, and automation.
Create high-quality enablement materials to help customers and partners adopt, integrate, and scale security solutions.

We're looking for a Tech Lead Engineer to drive the technical strategy for our cross-platform endpoint agent - built in C#/.NET and hardened for production across macOS, Windows, and Linux. You'll own features end to end across a managed fleet of enterprise devices, stay hands-on writing code, and raise the technical bar for a distributed engineering team. This role also means setting the standard for how the team uses AI coding agents responsibly - fast, but production-grade.

Responsibilities:
Drive the technical strategy for our cross-platform endpoint agent, focusing on C#/.NET core logic while ensuring production readiness across macOS, Windows, and Linux.
Provide technical leadership to a distributed team of engineers, raising technical expertise and engineering practices across the organization.
Own features from discovery to delivery, solving complex domain problems across a managed fleet of enterprise devices.
Maintain a hands-on approach by writing code and mentoring engineers to elevate the organization's technical capabilities.
Architect the agent using C# and platform-specific extensions, ensuring performant integration with each operating system's security frameworks.
Own high-impact technical decisions that balance velocity, security, and reliability.
Deliver maintainable features supported by comprehensive testing, metrics, and monitoring.
Shape the agent roadmap and ensure resilient production systems in collaboration with cross-functional leadership.
Participate in design and code reviews to maintain high engineering standards.
Champion AI-assisted engineering across the team - set the bar for how coding agents accelerate delivery, and establish the practices and guardrails that keep output production-grade.

We are looking for a Circuit Design Engineer to join the ride as we spearhead the next revolution in electronics!

Responsibilities
To develop IPs (Hard IP/Soft IP) in advanced process nodes (from definition, through design, post layout simulations, to full integration).
To work with experienced designers in the field and help enhance our solution for preventive maintenance.
Assist in the design and development of electronic circuits.
Conduct full simulation coverage of our circuits to ensure functionality and performance.
Collaborate with senior engineers to analyse and improve circuit designs.
Prepare and maintain documentation related to circuit designs and simulation results.
Stay updated with industry trends and advancements in circuit design and technology.
Support other engineering teams as needed.