we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.
As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.
Key Responsibilities
Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market
System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently
Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies.
Requirements: Basic Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field
3+ years of hands-on experience in Emulation at semiconductor companies
Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce)
Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs
Experience developing and maintaining execution flows for building, running, and debugging emulation models
"Can-do" approach with ability to own technical blocks and drive them to completion independently
Preferred Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or related field
Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis
Proficiency in scripting languages such as Python or TCL for automation and flow enhancement
Experience with standard debug environments (e.g., Verdi)
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink)
Background in hardware-software co-verification methodologies.
This position is open to all candidates.