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11/08/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macro and cluster-level blocks, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsys and Cadence.
* Engaged in defining implementation and signoff methodologies.
Requirements:
Basic Qualifications
- 8+ years of experience in physical design.
- Understanding the entire place and route flow (RTL to GDS).
- Very deep understanding of timing.
- Process and technology (advanced nodes) oriented.
- Leadership and mentoring skills.

Preferred Qualifications
- Full-chip experience (floor plan, layout, timing).
- Previous experience in high-speed designs, multi-voltage (low power) designs.
This position is open to all candidates.
 
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09/08/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.
2+ years of relevant experience.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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8773912
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10/08/2026
Location: Merkaz
Job Type: Full Time
we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Senior ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product ownership in a new site, designing the digital blocks that sit at the heart of our most ambitious connectivity projects.
As a Senior ASIC Design Engineer, you won't just build chips-you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving challenging problems in deep-submicron processes and want to contribute to the digital design foundation for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Design Ownership & Implementation
Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support
Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions
Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams
Quality Assurance & Design Optimization
Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient
Apply design techniques to meet PPA (Power, Performance, Area) targets
Contribute to design quality through verification and validation activities
Methodology Innovation & Collaboration
Participate in design methodology improvements and tool automation initiatives
Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter
Collaborate effectively across teams to ensure seamless integration.
Requirements:
Bachelor's degree in Electrical Engineering or related technical field
3+ years of experience in logic design at semiconductor companies
Knowledge and experience in Verilog and/or SystemVerilog
Excellent communication skills with ability to work effectively across teams
Understanding of digital design principles and RTL coding best practices
Preferred Qualifications
Master's degree in Electrical Engineering or related field
Knowledge of DDR and PCIe protocols and implementation
Understanding of power management techniques for low-power design
Familiarity with Clock Domain Crossing, simulation, debugging, synthesis, and timing analysis
Proficiency in scripting languages such as Python or Perl
Experience with high-speed serial interface designs or connectivity protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff RTL IP/Component Design Engineer, Cloud
About the job
In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next-generation of our platforms, we make product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Define the block level design document such as interface protocol, block diagram, transaction flow and pipeline, etc.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, and VHDL), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Support synthesis, timing/power closure, and Field Programmable Gate Array (FPGA)/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
Experience with ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).
Experience in ASIC development with Verilog/SystemVerilog, VHDL or Chisel.
Experience with System on a Chip (SoC) development cycles.
Preferred qualifications:
Proficiency with a scripting language (e.g., Python or Perl).
Knowledge of high performance and low power design techniques.
Knowledge of assertion-based formal verification.
Knowledge of FPGA and emulation platforms.
Knowledge of SOC architecture.
Knowledge in one of these areas: arithmetic units, bus architectures, processor design, accelerators or memory hierarchies.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8786943
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Micro-Architect, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead Design Activities at IPs, SubSystems(S.S) and SoC.
Define the block-level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up, as well as test plan development and coverage analysis for block and SOC-level verification.
Communicate and collaborate with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production or equivalent experience.
4 years of experience in technical leadership.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Experience in Micro-Architecture, RTL Design, Verification, Design Quality checks, Physical Design aspects of RTL coding, and Power.
Preferred qualifications:
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking: RDMA or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience working with software teams optimizing the hardware/software interface.
Familiarity with Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Proficiency in a procedural programming language (e.g., C++, Python, Go).
Knowledge of TCP, IP, Ethernet, PCIE and DRAM.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Design Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack using your knowledge.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
Experience developing Register-Transfer Level (RTL) for ASIC subsystems.
Experience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking like: remote direct memory access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in transmission control protocol (TCP), IP, ethernet, peripheral component interconnect express (PCIE) and dynamic random access memory (DRAM) including network on chip (NoC) principles and protocols (e.g., AXI, ACE, and CHI).
Proficiency in procedural programming language (e.g., C++, Python, Go).
Understanding of packet classification, processing, queuing, scheduling, switching, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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2 ימים
Location: Merkaz
Job Type: Full Time
we are looking for a Hardware Designer.
Key Responsibilities:
Conceptualization and Design: Work closely with cross-functional teams to understand project requirements and goals. Translate concepts into detailed hardware designs, considering functionality, performance, and manufacturability.
Prototyping and Testing: Develop prototypes for hardware designs, conducting thorough testing and analysis. Iterate designs based on test results, ensuring optimal performance and reliability.
Custom Hardware Solutions: Design custom hardware solutions tailored to specific project requirements. Stay abreast of industry trends and emerging technologies to incorporate innovative features into hardware designs.
Collaboration: Collaborate with software developers, firmware and mechanical engineers, and other team members to ensure seamless integration between all system components. Participate in design reviews and provide constructive feedback.
Documentation: Prepare and maintain detailed documentation for hardware designs, including schematics, bills of materials, and design specifications.
Requirements:
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
Proven experience in hardware design, with a strong portfolio showcasing successful projects.
Proficiency in hardware design tools such as CAD software and experience with PCB layout.
Solid understanding of embedded systems, microcontrollers, and digital signal processing.
Excellent problem-solving skills and the ability to work in a collaborative team environment.
Preferred Skills
Familiarity with FPGA design and programming.
Experience with high-speed digital design and signal integrity analysis.
Knowledge of industry standards and best practices in hardware design.
Strong communication skills and the ability to present complex technical concepts to non-technical stakeholders.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8820044
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לפני 21 שעות
מיקום המשרה: חיפה וסביבתה
סוג משרה: משרה מלאה
קצת על התפקיד:
הובלה של פיתוח הכרטיס משלב גיבוש הדרישות, תכן הכרטיס ועד לליווי והעברת המוצר לייצור סדרתי.
התפקיד כולל אפיון דרישות, בניית ארכיטקטורה, בחירת טכנולוגיות, הובלה של צוות פיתוח מטריציוני, הובלת סקרי תיכון וסקרים מקצועיים, אחריות על הביצועים, איכות ולו"ז הפיתוח.
דרישות:
מהנדס.ת אלקטרוניקה בעל ניסיון מעשי של שלוש שנים לפחות בפיתוח חומרה ופיתוח .High Speed Board Design
היכרות טובה עם כרטיסים משובצי CPU\FPGA , פרוטוקולי תקשורת מהירה וטרנסיברים מהירים.
ידע בפיתוח FPGA ו-VHDL - יתרון.
ניסיון בפיתוח חומרה מוקשחת למערכות צבאיות - יתרון. המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
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8823644
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07/09/2026
Location: Herzliya
Job Type: Full Time
The WSSI (Windows Silicon System Integration) team is looking for a Senior Silicon Designer to help design complex silicon subsystems that are part of advanced solutions delivered in Windows client products.
This is an opportunity for an excellent silicon engineer to take meaningful technical ownership in a dynamic, agile, and highly collaborative environment. You will work on advanced subsystem design spanning microarchitecture, RTL implementation, integration, and design quality, with close collaboration across architecture, verification, firmware, system engineering, and physical design teams.
The role focuses on complex security-oriented silicon subsystems. We are looking for someone who combines strong design fundamentals with curiosity, ownership, and the motivation to learn and apply modern techniques - including AI-assisted workflows - to improve silicon development productivity and quality.


Responsibilities
Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture and system requirements into clean, efficient, and high-quality hardware implementations.
Collaborate closely with verification, firmware, system engineering, architecture, and physical design partners to define interfaces, debug complex issues, manage technical risks, and deliver robust silicon solutions.
Contribute to subsystem integration, design reviews, quality checks, synthesis readiness, timing considerations, and design handoff flows.
Explore and apply modern silicon development workflows, including AI-assisted techniques for design productivity, debug, documentation, and quality improvements.
Act as a technical leader within the team by mentoring others, raising the engineering bar, and helping drive execution in a fast-moving environment.
Requirements:
Qualifications:
B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related technical field.
Proven experience and technical excellence in RTL design for complex IPs, subsystems, or SoCs.
Proven hands-on experience with Verilog/SystemVerilog, microarchitecture definition, RTL implementation, design reviews, and design quality practices.

Preferred Qualifications:
Experience applying AI-assisted techniques to improve silicon design productivity, debug, documentation, automation, or workflow efficiency.
Experience with security-oriented silicon subsystems, including crypto engines, memory protection, secure boot, trusted execution, or related hardware security domains.
Experience working across key parts of the silicon development lifecycle, including verification collaboration, integration, synthesis readiness, timing considerations, and design closure.
Experience with low-power design, performance optimization, clock/reset architecture, CDC/RDC, lint, synthesis, or timing closure.
Experience acting as a technical leader, design owner, or mentor for other engineers.
Strong problem-solving skills, ownership mindset, and ability to drive technical work independently while collaborating effectively across disciplines.
High motivation, curiosity, and willingness to learn new domains, tools, and methodologies.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8812523
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Location: Haifa
Job Type: Full Time
We are looking for a talented Hardware Board Designer to join our multidisciplinary R&D team. This is an exciting opportunity to take part in the design and development of advanced electronic systems, working alongside hardware, firmware, software, and system engineers from concept through integration.
We are looking for a creative, hands-on engineer with a passion for hardware design and a desire to work on cutting-edge technologies.
Responsibilities:
Design and develop complex electronic boards from concept to production.
Perform hands-on schematic design and component selection.
Support and guide PCB layout activities.
Prepare and present design reviews.
Collaborate closely with firmware, software, RF, and system engineering teams to ensure successful system integration.
Develop advanced multidisciplinary systems incorporating:
CPUs / SoCs
FPGA-based designs
Analog and mixed-signal circuits
High-speed interfaces (DDR, PCIe, Ethernet, LVDS, etc.)
RF transmit and receive chains
Filters and amplifier circuits
Power supply and power management circuits
Support board bring-up, debugging, validation, and troubleshooting.
Requirements:
B.Sc. in Electrical Engineering or a related field.
5+ years with proven experience in board-level hardware design.
Experience with schematic design and PCB development.
Experience designing digital and analog circuits, including high-speed interfaces (DDR, PCIe, Ethernet, LVDS, etc.).
Experience working with processors and FPGA-based systems.
Familiarity with RF circuits and power supply design - an advantage.
Strong analytical skills, a hands-on approach, and the ability to work in a multidisciplinary environment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8792012
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design Engineer, Edge AI, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, youll work to shape the future of an Edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
Youll be part of a team that pushes boundaries, developing robust, autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You'll contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Lead a complex ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience with RTL development for ASIC subsystems using Verilog.
Experience with speed interfaces such as PCIe, InfiniBand, and their low latency, security, and reliability principles.
Experience with micro architecture, design, verification, logic synthesis, and timing closure.

Preferred qualifications:
Experience with scripting languages (e.g., Python or Perl).
Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Knowledge of high performance and low power design techniques.
Knowledge of FPGA, emulation platforms, and SoC architecture.
Knowledge of assertion-based formal verification.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8783582
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8782537
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
20/08/2026
Location: Haifa
Job Type: Full Time
We are looking for an experienced Board Design Engineer to support the design and development of complex mixed-signal and high-speed digital boards for advanced medical systems. You will join our multidisciplinary team in CT organization.


Your role :
Design and develop multi-layer high-speed PCBs and define layout constraints.
Perform component selection and schematic design.
Design power management circuits (including DC-DC converters and power distribution).
Design and support analog circuits and boards.
Support EMC/EMI tests.
Lead board bring-up, validation, and lab debugging. Troubleshoot system-level HW/FW issues.
Support high-speed interfaces such as DDR4/DDR5, PCIe, and Ethernet.
Support Install Base (IB) activities , field investigations, and NPI activities.
Support Lifecycle Management (LCM) tasks, including EOL handling.
Work with PCBA vendors on production, manufacturing issues, and yield improvements.
Search for component alternatives, test and approve replacements.
Work with PLM (Product lifecycle Management) system and support ECO creation and release.
Requirements:
You're the right fit if:
Bachelor's degree in Electrical Engineering.
7+ years of experience in board design working on multidisciplinary products.
Experience in board design tools, preferably Siemens EDM / Xpedition.
Deep understanding of Signal Integrity (SI) and Power Integrity (PI).
Experience in digital circuits design, power design, and analog circuit design.
Strong lab debugging & root-cause analysis skills using tools such as oscilloscopes and signal analyzers for problem solving.
Experience with DDR design constraints and validation.
Familiarity with PLM tools, especially Windchill.

Advantages
Experience with FPGA-based systems.
Experience in medical devices or other regulated industries.
Background in thermal design and power optimization.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8790311
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, is highly beneficial for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8782626
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
31/08/2026
Location: Netanya
Job Type: Full Time
Join our Communication Systems as a Hardware Board Design Engineer, where you will contribute to complex design projects and the development of cutting-edge communication systems. In this role, you will design high-performance boards for advanced avionics systems, working as part of a professional hardware design team. Your expertise will drive innovation and ensure the highest standards of quality in our products.

Responsibilities:
End to end boards design.
Starting from the component's selection and evaluation, schematic design, thermal considerations, mechanical constraints.
Layout design, production supervision, bring-up on lab.
Including all the relevant document writing and conducting the design reviews needed until the product is finished.
Leading products from the definition until their release.
Supporting production when needed.
Requirements:
Education:

BSc/MSc in Electrical/Electronics-Engineering from a known institute.
Experience and skills:
Electronics Engineer. 3+ years of board design. Proven experience in complex work with multilayer boards.
Knowledge and experience with digital circuits and interfaces, Memories interfaces, Microprocessors, DSP.
Knowledge and experience with analog circuits, DC/DC, ADC, amplifiers.
High knowledge of Layout design considerations, power planes, critical circuits, noise filtering, and crosstalk avoidance techniques.
Experience in circuit trouble shooting and bring-up working together with SW teams.
Modeling and simulation experience.
Understanding of EMI / EMC concepts.
Ability to understand product requirements and industry standards demands.
Ability to write specification documents, technical reports, design verification documents.
Good knowledge of Schematic design tools (Orcad preferred, not exclusive), very good handling of Office environment; Wide knowledge of lab equipment.

Personal Requirements:
Excellent teamwork skills and ability to interface with various levels of technicians, engineers, suppliers and manufacturing.
Ability to work under pressure with high sense of responsibility and strong commitment to due dates.
Highly organized, able to work independently with limited supervision, including working with and supervising external subcontractors (mechanical, layout designers).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8804089
סגור
שירות זה פתוח ללקוחות VIP בלבד
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