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We are seeking an experienced Principal Architect to lead the architecture of high-performance connectivity solutions, with a strong focus on PCIe, high-speed networking, and Ethernet-based systems.
This role will define next-generation architectures for AI infrastructure, working at the intersection of silicon, system, and protocol design. You will play a key role in shaping innovative solutions that enable hyperscale customers to build scalable, high-bandwidth, and low-latency systems.

This is a unique opportunity to join a new and growing Israel site, influence technical direction, and take ownership of critical architectural decisions impacting industry-leading products.

Key Responsibilities
Define and drive system and chip-level architecture for high-speed connectivity products.
Lead architecture for PCIe-based interconnects, networking protocols, and Ethernet subsystems.
Analyze system requirements and translate them into scalable and efficient hardware architectures.
Drive tradeoff analysis across performance, power, latency, area, and cost
Collaborate with cross-functional teams including RTL, Physical Design, Firmware, Validation, and Product Engineering.
Define and review micro-architecture specifications and ensure alignment across teams.
Contribute to standard-based and custom protocols for next-generation AI infrastructure.
Support performance modeling, simulation, and architectural validation.
Work closely with customers and partners to understand emerging use cases and requirements.
Mentor engineers and help build strong technical leadership within the Israel R&D center.

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment with the focus on the following goals.

Deep understanding of components/modules within wireless communication systems and the corresponding calibration and impairment reduction techniques - Develop methods/algorithms to alleviate hardware induced impairments by calibration, cancellation and other applicable techniques - PHY firmware architecture and design, including calibrations, real-time processing flows, collaboration with RF hardware, microcode, and MAC layer.

Develop highly efficient designs delivering outstanding performance, optimizing power and memory footprints while meeting hard-realtime latency requirements.

Debug real-time systems with limited visibility, working hands-on with development boards and lab equipment.

Collaborate with Radio, MAC, and Systems engineering teams to architect, define and implement innovative algorithms, calibrations, and protocols.

Support pre-silicon validation efforts, including simulation, emulation, and FPGA prototyping.

Develop SoC test and calibration capabilities for chip, module, and product factories.

Support post-silicon bringup, validation, performance characterization, system integration and debugging. - Repeatedly measure and optimize results using various test harnesses - Automate calibration and verification processes

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment with the focus on the following goals.

Deep understanding of components/modules within wireless communication systems and the corresponding calibration and impairment reduction techniques - Develop methods/algorithms to alleviate hardware induced impairments by calibration, cancellation and other applicable techniques - PHY firmware architecture and design, including calibrations, real-time processing flows, collaboration with RF hardware, microcode, and MAC layer.

Develop highly efficient designs delivering outstanding performance, optimizing power and memory footprints while meeting hard-realtime latency requirements.

Debug real-time systems with limited visibility, working hands-on with development boards and lab equipment.

Collaborate with Radio, MAC, and Systems engineering teams to architect, define and implement innovative algorithms, calibrations, and protocols.

Support pre-silicon validation efforts, including simulation, emulation, and FPGA prototyping.

Develop SoC test and calibration capabilities for chip, module, and product factories.

Support post-silicon bringup, validation, performance characterization, system integration and debugging. - Repeatedly measure and optimize results using various test harnesses - Automate calibration and verification processes.

As we expand our presence in Israel, we're seeking a visionary Staff DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Staff DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy
Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support.
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards.
​DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies.

Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production.
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance.
Drive test coverage and quality metrics to meet stringent manufacturing requirements.

Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR.
Participate in developing and maintaining cutting-edge DFT implementation flows.
Automate and improve methodologies using advanced scripting and tools.

HW Application Engineer - Job description: we are a leading supplier of microcontrollers and security hardware solutions for tier-1 customers in the computing and servers business. It is a self-contained design center, spanning from product management, system and chip architecture, through design, software development, system engineering and production. The group works closely with major customers, primarily key OEMs in the computing space, to develop semi-custom, innovative solutions for a wide range of application platforms. We are looking for a Hardware Application Engineer, to maintain and support our strong collaboration with our customers.
What You Will Be Doing
* Lead customers through all stages of designing their systems based on Nuvoton manageability and security microcontrollers (i.e., BMC, EC, SIO and TPM) from planning till production.
* Respond and resolve customer hardware related issues and requests, reported by the regional support team (FAEs) or directly by customers.
* Work closely with R&D, architects and PMs to provide issue resolutions, workarounds, and implement product features or support tools.
* Key contributor in complex debug tasks for issues found by customers; build debug strategies and hands-on work with the design team through the debug.
* Develop deep knowledge of customer applications and systems, recommend application solutions, design ideas and products to customer design teams.
* Develop and maintain technical documentation (e.g., reference schematics, application notes, design guidelines).
* Provide inputs and participate in next generation ICs definition based on customer inputs.
* Contribute to the definition of innovative and differentiated products.

We're seeking a passionate and skilled Embedded Firmware Engineer to play a pivotal role in delivering the next generation of us. In this highly visible position, you'll be at the intersection of hardware and software, collaborating closely with logic designers to deeply understand system-level operations and performance requirements for hardware validation.

In this role, you will develop critical low-level embedded firmware specifically designed to validate hardware functionality, ensure conformance, and drive performance during the bring-up and testing phases of new silicon. This involves designing, developing, and integrating complex drivers, diagnostic tests, and infrastructure essential for SoC bring-up, post-silicon validation, and debugging activities. Ultimately, you'll lead hands-on firmware development, system-level validation, and problem-solving at the hardware-software interface in a dynamic, collaborative environment, with your work directly enabling the successful launch of future our products by ensuring our silicon meets the highest standards.

You will own the complete EVB hardware bring-up process from initial power‑on through release to internal engineering teams. This role is highly practical and technical, responsible for identifying and resolving complex board- and ASIC-level hardware issues, documenting findings, and driving corrective actions.

Key responsibilities
Own and execute complete EVB hardware bring-up, validation, and qualification activities in the lab.
Perform initial board power‑up, verify power rails and sequencing, validate clocks and resets, and exercise interfaces.
Lead hands‑on debugging and root‑cause analysis of board‑level and ASIC-related hardware failures.
Read and use complex hardware schematics and PCB layout data as primary debugging tools; review PCB manufacturing data when investigating failures.
Perform detailed lab measurements (oscilloscopes, VNAs, logic analyzers, power supplies, electronic loads) and correlate results with schematics, layout, ASIC requirements, and simulations.
Collaborate with SI and PI teams to investigate signal-quality, channel-loss, reflections, power-delivery, and noise issues.
Work with FPGA and BSP/SW engineers during initial system bring-up and debugging.
Document bring-up procedures, debug findings, measurements, known issues, workarounds, and solutions.
Support manufacturing and assembly debug (PCB, SMT, soldering, component and assembly-related failures).
Drive hardware issues through identification, root‑cause analysis, corrective action, implementation, and final validation.

As a Wireless Platform Architect, you will play a key role in defining the architecture of our company's next-generation Radio Subsystem (RSS) platforms for wireless technologies including Wi-Fi, Bluetooth and UWB. You will take end-to-end responsibility on the system-level architecture of a complete wireless communication subsystem, including system spec, requirements for implementation teams, definition of interfaces and testing concept.
You will work closely with multidisciplinary development teams and directly with customers, from early system architecture and trade-off analysis through implementation, integration, validation and productization.
Responsibilities:
Define the RSS end-to-end architecture and HW/SW partitioning, including interfaces between the radio, PHY, MAC, CPU/MCU, memories, PMU, clock and reset management (CRM) and other subsystem components.
Define architecture and operational mechanisms for multi-protocol operation and interoperability, including HW interfaces, state machines, control flows and operation sequences.
Define sleep/wake-up modes, testability, security and debug.
Drive PPA optimization and competitive benchmarking of the RSS, with particular focus on low-power operation, silicon area and overall system efficiency.
Work closely with RF, PHY/algorithm, HW, SW/firmware, verification and integration teams, from early system studies and architecture definition through RTL/FPGA validation and system bring-up.
Work directly with customers during technical engagements to define the RSS integration into their SoC and support customers throughout SoC integration, validation and productization, addressing system-level architecture, interoperability and integration challenges.

We are developing leading edge products, manufactured on leading edge technologies. We offer a dynamic, open, teamwork environment operating at high pace mode.

Key job responsibilities
Primary responsibilities:
- Development of DfX (DfM, DfT, DfQ&R, etc.) methodologies and BKMs (Best Known Methods).
- DfX activities during the product design stage.
- Product quality & reliability validation (QRV) and ongoing quality & reliability monitoring (OQRM).
- Q&R engineering of volume manufacturing: auditing, monitoring, risk assessment and disposition of non-conformance events/non-conforming material, defining and implementing corrective actions.
- RMAs: investigation, disposition, reporting and follow-up.

We are looking for a Mechanical Design Engineer to join our Electronic Warfare R&D team and work on mechanical development of advanced counter-UAV detection and jamming systems.

Key Responsibilities
Lead full-cycle mechanical design of electronic and RF system assemblies - from initial architectural concept, thermal and structural analysis, and PCB integration to volume serial production
Perform structural, thermal, and modal analyses.
Select suitable materials, components, and manufacturing technologies.
Manage development and engineering processes end-to-end: from concept, through prototyping, to full production implementation, ensuring quality and supply chain standards.
Prepare drawings, production files, and BOMs according to ISO standards.
Develop mechanical solutions for multidisciplinary systems (mechanics, RF, electronics, aeronautics).
Define and design cable assemblies, including cable routing and integration within the system
Conduct verification and validation testing.
Work with advanced CAD tools: SolidWorks for design and PDM for production document management.

You'll own significant product initiatives end-to-end, help shape how design integrates into the development process earlier and more effectively, and serve as a key bridge between our Israel and Montréal design teams. It's a hands-on role with real influence over the products we ship and the systems we build on.

What you'll be doing
Own the design of complex product initiatives from discovery through to production-ready specs, working closely with Product Managers and Engineering teams based between Israel and Montreal.
Map user flows and define information architecture for sophisticated, data-heavy workflows, translating business and technical requirements into intuitive product experiences.
Create high-fidelity mockups, design specifications, and interactive prototypes that are ready for developer handoff and stakeholder review.
Participate in product discovery, planning, and refinement sessions to ensure design is involved early and continuously throughout the development lifecycle.
Conduct design QA during implementation to ensure the shipped experience matches the intended design, catching inconsistencies before they reach users.
Apply the shared design system consistently across your work, and identify opportunities to extend or improve it when existing components and patterns don't meet product needs.
Coordinate with the Montréal design team to maintain cross-team consistency, reduce duplicated efforts, and contribute to a unified design direction.

Product Designer
Job Summary:
Based in the Tel Aviv office, in a hybrid model.
About us:
Join the public powerhouse that is securing the future of AI.
We have officially entered a new era. Fresh off a headline-making successful IPO and boasting over $1.3 Billion in ARR, we have the market stability of a giant and the hunger of a startup. Weve already conquered Data Security-now, we are pivoting to our most ambitious mission yet: Securing and Accelerating the World's AI Transformation.
As our designer, you will be pioneering the next generation User Experiences for the enterprise! From AI to air-gapped immutable backups to defending against ransomware, our tech stack is the definition of cyber resilience. We are a Gartner Magic Quadrant Leader and a winner of the Red Dot & iF Design Awards because we believe security and protection should be powerful and usable. Come build the safety net for the AI generation.
About Team & About Role:
Our design team is strong and mighty, with about 60 amazing individuals from all walks of the industry and life located worldwide. As our company and our products grow rapidly, it is crucial to scale the experience of our product and our design team in the right way and with the right people. Every hire counts!
We are seeking a core hire for our design team. We are looking for a highly-skilled UX Designer for our Israel site that can help us drive towards making us a benchmark for enterprise design.
What you'll do:
Champion the design process, pushing yourself and the design team to take chances and explore big ideas before narrowing in on feasible, creative solutions with attention to detail
Produce deliverables at every stage of the design process, such as storyboards, wireframes, user flows, interactive prototypes, and pixel-perfect visual assets
Partner with the team of designers, product managers, and engineers throughout the design process - from creating user flows and wireframes to building user interface mockups and prototypes
Give and solicit feedback from other designers in order to continually raise our bar for quality
Cultivate relationships with our customers to ensure design truly reflects the needs of the users we are serving (UX)
Be part of evolving our design language and the design system that upholds it
Work side-by-side with our design system UI engineers to ensure precise implementations
Help set the bar for consumer-grade design in the enterprise space.

We are a leading AI-based content authentication platform focused on developing cutting-edge technology to detect deepfakes, plagiarism, and copyright infringement, while supporting original writing. We are working with some of the worlds largest enterprises, publishers, and educational institutions, and are seeking an experienced and innovative Product Designer to be part of our product-led team and to turn our award-winning algorithms into an intuitive, seamless user experience.
Responsibilities:
Design the product. Own flows end-to-end, sketches to high-fidelity Figma, every state, hand-offs developers can build from without guessing.
Design the website. Own copyleaks.com: landing pages, tool pages, pricing, campaign pages and templates. Most of our traffic arrives organically on a tool page, your design is the first thing they ever see of us. Mobile-first here, even though the app itself is desktop-heavy.
Turn complexity into clarity. LLMs, perplexity scores, match algorithms. Make that data simple,non-threatening, actionable.
Evolve the design system. We have a real one, in Figma and in code. Keep product and web consistent. Reuse before you invent.
Bridge design and code. You dont need to code, but you know whats feasible, whats expensive, and what breaks at 375px

We are seeking a Windows Internals Engineer for our Tel Aviv R&D center. In this role, you will be a key member of the team that designs and develops the low-level Windows components for our revolutionary Cortex XDR endpoint security product, directly contributing to our mission of protecting our digital way of life from advanced cyberattacks.
Key Responsibilities:
Contribute to the research and development of Windows drivers, services, and other system-level components.
Challenge the status quo by finding and implementing innovative solutions to counter sophisticated cyberattacks.
Proactively collaborate and exchange information with engineers, security researchers, and product managers to lead projects and initiatives.
Design, develop, and debug complex, high-performance, multi-threaded code in C++.
Conduct in-depth analysis of system internals and focus on the details to produce robust, high-quality security features.
Apply learning from security research and reverse engineering to simplify complex problems and develop practical solutions.

As a Director of Engineering at Cortex Cloud, you will lead an engineering group of approximately 25 engineers operating in one of our most complex and cross-functional domains, focused on building KSPM (Kubernetes Security Posture Management) and CNS (Cloud Network Security).
This highly technical group works closely with some of the largest companies in the US across various domains.
This role requires a strong blend of strategic leadership and deep technical expertise, including systems design and large-scale distributed cloud architectures.
You will be responsible for driving the design and delivery of complex, high-impact systems, while ensuring your teams execute against the roadmap with both speed and engineering rigor.
Key Responsibilities
Build, mentor, and lead high-performing backend engineering teams, fostering a culture of empowerment and driving both individual growth and collective impact.
Partner closely with Product Management and cross-functional teams (Infrastructure, Research, UX) to define priorities and shape multi-quarter product roadmaps, ensuring alignment across all stakeholders.
Own the end-to-end software development lifecycle, translating product strategy into executable plans and ensuring consistent, high-quality, on-time delivery.
Provide architectural leadership for scalable, distributed systems operating at petabyte scale, guiding the design and implementation of high-throughput, cloud-native backend microservices.
Drive production readiness by enforcing best practices around deployment, observability, reliability, and runtime stability, focusing on the details to ensure operational excellence.
Align stakeholders across business units through clear communication of technical strategy, trade-offs, priorities, risks, and execution plans.
Engage directly with strategic enterprise customers-including some of the largest companies in the US-to lead technical deep dives, review architecture, and influence future product direction.
Foster a culture of high engineering standards, accountability, and continuous improvement, with a strong emphasis on quality and security.