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Play a critical role in ensuring the functional integrity, performance, and reliability of next-generation optical chips.

Responsibilities
Develop robust verification plans for complex digital and mixed-signal optical chip designs.

Collaborate closely with architects, designers, and customers to understand logic requirements, translate them into verification strategies, and deliver clear, actionable feedback throughout the development process.

Perform netlist-level simulations with SDF back-annotation for timing-accurate verification

Support FPGA/ASIC bring-up and post-silicon validation as needed

Develop, maintain, and optimize testbenches and verification components using advanced SystemVerilog features, such as constrained random testing, assertions, and transaction-level modeling, to create robust coverage-driven environments.

Design scalable, reusable UVM-based environments and components (e.g., agents, monitors, scoreboards) for block- and system-level verification. Employ UVM to achieve regression automation, functional coverage closure, and high bug-detection efficiency.

Develop and execute verification strategies for digital blocks implementing or interfacing with PCI Express (PCIe). Apply protocol-checking, compliance validation, error injection, and debug skills for PCIe endpoints and root complex devices. Use protocol analyzers and simulation environments to validate correct implementation across all protocol layers.

Participate in the verification of RISC-V CPU cores and subsystems. Create test plans targeting processor modules (ALU, decoder, register file, control logic), with reference model comparisons, signature checks, and coverage of edge-case scenarios. Leverage formal verification and compliance suites for thorough design validation.

Plan and perform end-to-end ASIC verification, from block-level testbenches to full-chip integration. Execute functional and regression tests, formal verification, and coverage analysis. Debug and resolve design issues, ensuring pre-silicon reliability before manufacturing. Engage in design reviews and system-level protocol validation with cross-functional teams.

Key job responsibilities
* Design and implement advanced Design-for-Test (DFT) architectures for complex semiconductor platforms.
* Develop high-quality test and debug patterns ensuring robust performance.
* Conduct comprehensive static timing analysis across multiple DFT modes.
* Verify intricate DFT logic and components with precision and creativity.
* Support silicon bring-up and device diagnostic processes.

Your day will be filled with complex problem-solving and collaborative innovation. You'll work alongside world-class DFT engineers in a dynamic environment, developing semiconductor technologies that support global cloud infrastructure. Our team thrives on creativity, technical excellence, and continuous learning.

Required Technical Lead, Cloud TPU
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
This role is a unique leadership opportunity to technically lead by example an engineering team dedicated to critical Cloud Tensor Processing Unit (TPU) software services, which empower our global AI customers. As a Technical Lead (TL), you will lead the architecture and execution of large-scale ML infrastructure, requiring a deep understanding of Large Language Model (LLM) operations from chip level to fleet levels. You will be responsible for solving complex ML infrastructure issues, driving technical strategy, fostering a high-performance team culture, and working directly with customers to ensure successful landings.
Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Act as the crucial bridge between raw Tensor Processing Unit (TPU) silicon and production-ready machine learning, owning the software integration and operational ecosystem that powers our most advanced AI.
Lead the end-to-end New Product Introduction process-coordinating complex cross-functional launches from initial concept to General Availability-while ensuring the reliability and scalability of a massive fleet of TPU chips.
Drive foundational engineering efforts, such as developing the TPU runtime API, qualifying the OS images for TPU Virtual Machines (VMs) and Bare Metal instances, and managing fleet-wide reliability through advanced telemetry and automated repair workflows.
Lead the architecture, technology and the overseeing of implementation of the TPU solutions to production.
Analyze customers issues (working with customers and the field team) and translate these into viable technical solutions.

we are looking for a Junior Physical Design Engineer.
You'll be joining our Physical Design team , which is at the center of the silicon development . Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.
We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Required Firmware Engineer, Cloud
About the job
Cloud's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Cloud's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. You will anticipate our customer needs and be empowered to act like an owner, take action and innovate. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
As a firmware engineer, you will work on a specific project critical to Cloud's needs with opportunities to switch teams and projects as you and fast-paced business grow and evolve. You will anticipate customer needs and be empowered to act like an owner, take action and innovate. You will display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Build C/C++ firmware running on embedded processors with limited memory footprints on the SoCs.
Develop tools to update and debug the firmware, enable emulation, chip bringup, and hardware debugging.
Play key role in Emulation, chip bring up, and SoC deployment, and contribute to all layers of the data center software stack to deploy SoCs to production.
Create code generators to generate C++ code based on hardware specifications.

We are looking for a Logic Design Engineer to join the ride as we spearhead the next revolution in electronics!.

Our Logic Design team builds the on-chip monitoring IP at the heart of our product - digital blocks that ship inside some of the most advanced chips in the industry. Were growing the team and looking for a Logic Design Engineer to take ownership of that logic, working alongside circuit, verification, physical design, EDA, and AE engineers. A strong fit if you enjoy hard digital design problems in a collaborative, technically demanding environment.

Responsibilities
Define and implement digital logic micro-architecture - in plain English, diagrams, and SystemVerilog.
Verify design quality against industry standards using static analysis tools (Lint, CDC, RDC).
Work with Circuit Engineers to turn low-level circuit designs into the well-behaved, insightful agents at the core of the proteanTecs solution.
Work with Verification Engineers to simulate and debug the digital logic.
Work with Physical Design Engineers to ensure correct implementation of our special circuits.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Junior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.
As a Junior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified
Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices
Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment.

In this role, you will be a key contributor to the design and implementation of AI Graph Compiler software stack for Neural Processing Units (NPUs). You will take part in defining software architecture, implementing performance-critical components, and enabling efficient execution of advanced neural networks under tight power, memory, and latency constraints.

You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of NPU embedded solutions, actively promoting AI capabilities to the customers.

What will you do:

Own and design key components of the AI Graph Compiler software stack for NPU-based systems.

Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.

Collaborate on HW-SW co-design, influencing NPU architecture.

Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.

Mentor junior engineers and contribute to technical best practices.

we are looking for a Algorithm and Applied AI Scientist (DSP).
As an Algorithm and Applied AI Scientist (DSP), you will serve as the technical lead for an innovative project focused on advanced signal processing and data analytics applications. You will work with unique datasets from various signal-generating sources, researching and developing novel models, and analysing, maturing, and extracting features that have a significant impact on industrial manufacturers globally. In this role, you will be instrumental in defining project objectives, identifying customer value, and pushing the team toward successful outcomes. Joining AI team offers ongoing professional growth in leadership, algorithm development, research, innovations, and technical data analysis.
A Day In Your Life:
Be the technical lead of an innovative project.
Develop a comprehensive understanding of industrial data by exploring its physical properties and the relationships among different data streams.
Oversee the full algorithm development cycle, spanning from initial problem definition to the deployment of production-ready feature-based AI models, SDLC starting from feature discovery that is being tracked by sensor behavior patterns.
Architect and build diverse predictive and anomaly classification models using sensor time-series and textual information.
You will gain a deep proficiency in the industrial world and the connection between datasets to generate actionable insights.
Utilize classic and cutting-edge technologies, such as Generative AI, transformers, TSFM, TGNN, deep learning, and traditional statistical methods, time-series, and textual data to generate actionable insights.
Partner with the product team and external customers to create data-driven solutions that address real-world business needs.

Your Role:
Design, develop, and maintain complex, scalable, and high-performance systems with a focus on writing clean, efficient, and maintainable code.
Collaborate with cross-functional teams, including product managers and architects, to implement technical solutions aligned with business objectives.
Provide input on architectural design and participate in technical planning to ensure long-term maintainability and compliance with standards.
Identify and troubleshoot production issues, conducting root cause analysis and implementing fixes to ensure system reliability.
Contribute to code reviews and technical discussions, sharing knowledge and fostering a culture of collaboration and continuous improvement.
Your Opportunity:
Develop critical components and systems that drive business outcomes, while maintaining and enhancing core infrastructure for scalability and reliability.
Participate in the design and development of new features, integrations, and enhancements to software applications, databases, and interfaces.
Support and improve automated testing and deployment processes to ensure smooth delivery of new features and system updates.
Collaborate with other senior engineers to drive the technical direction of projects and ensure high-quality software delivery.
Learn how to use the modern AI tools effectively and responsibly.

We're looking for a VP R&D to build both the technical foundation and the engineering organization behind that platform. This is not pure people management, and it's not a chief-architect role in disguise. It's a rare combination: a deeply technical leader who can challenge the strongest engineer in the room on architecture, and who also builds an organization where talented people grow, decide independently, and own outcomes end to end.



What You'll Own

Technical direction: Define architecture and technical strategy with the CTO, Product and AI leadership. Make real tradeoffs between speed, simplicity, reliability and long-term scale. Stay deep enough to lead architecture reviews, surface hidden risks, and tell the difference between an impressive demo and a dependable production system.
An enterprise-grade agentic platform: Agent orchestration, planning and tool use governed knowledge and policy representation retrieval, context and memory evaluations human review and escalation permissions, identity, security and auditability reliability and observability cost, latency and model performance enterprise integrations.
The R&D organization: Design the structure for the company's next stage. Recruit exceptional engineers and engineering leaders at a consistently high bar. Grow managers and senior ICs who own major domains independently. Set clear expectations, feedback and performance standards - and build a leadership bench so the org doesn't depend on a handful of people.
Autonomy with accountability: Define outcomes, decision boundaries and interfaces, then push decisions as close to the problem as possible. Autonomy that produces better and faster decisions - not ambiguity, duplicated work, or diffused responsibility.
Velocity and quality together: An operating model that moves fast without normalizing instability. Better planning, testing, deployment, observability and incident learning. AI-native development as real leverage for every engineer, with clear standards for security, correctness and human judgment.
Business impact: Shape the roadmap with Product rather than receiving requirements. Join strategic customer conversations where technical leadership builds trust and unblocks adoption. Operate as a company leader, not only a function leader.

You will join the Deployment Platform team, which puts technology directly in the hands of customers, field technicians, and partners. As an AI-Native mobile engineer, your primary development framework is Flutter (with native iOS and Android used when needed), building the mobile application central to field deployment. You are also comfortable across the full stack to ensure end-to-end feature delivery. Most importantly, you will shape the next generation of agentic installation experiences that define how industrial AI reaches the factory floor. This is a high-impact role at the intersection of mobile, IoT, and AI.
A Day In Your Life:
Design, build, and maintain high-quality, cross-platform mobile applications for iOS and Android using the core Flutter/Dart stack.
Lead the design and shipment of agentic-first workflows for guided installation, leveraging LLMs (Azure OpenAI, Gemini) to assist technicians and automate decision-making in the field.
Implement complex IoT/Hardware integration features, including NFC provisioning, AR field tools, and indoor positioning/navigation.
Contribute to backend and frontend services/APIs to ensure seamless, end-to-end feature delivery.
Architect and maintain a scalable, modular monorepo, ensuring robustness through strong state management (BLoC/RxDart) and comprehensive test coverage.
Collaborate with product and design teams to deliver exceptional UI/UX, including adaptive and RTL-aware layouts.

We are looking for a hands-on DevOps Engineer with a strong cloud-native mindset to build, maintain, and evolve our highly scalable, highly-available cloud infrastructure. This role is pivotal in driving operational excellence, security, and automation across our entire engineering organization. You will promote communication, integration, and collaboration to significantly enhance our software development productivity and reliability. You'll work closely with engineering and product teams to streamline delivery, enforce platform standards, and enable a high-velocity development environment-all while keeping reliability and security top of mind.
Responsibilities:
Design, Automate, and Manage complex cloud infrastructure on AWS using best-in-class Infrastructure as Code (IaC) practices.
Lead the operation and enhancement of our production Kubernetes environments (EKS), focusing on automation, security, observability, and seamless CI/CD integration.
Drive continuous improvement across platform tooling, developer experience, and operational processes to meet our ambitious performance and uptime goals.
Implement and enforce security-first infrastructure patterns, including strong IAM, network segmentation, and secure secrets management.
Actively contribute to high-level technical design discussions and cross-functional architectural decision-making, ensuring solutions align with long-term platform strategy.
Drive AI-Powered Automation: Design, build, and deploy infrastructure for autonomous AI agents and agentic flows, integrating AI tooling directly into developer platforms and CI/CD pipelines.
Architect AI Platform Infrastructure: Establish reliable, scalable, and secure AI/DevOps orchestration frameworks to enable continuous deployment and runtime management of AI-driven tools.

We are rapidly growing into new verticals, and we are seeking a visionary Developer Relations Senior Manager to broaden our impact. In this regional leadership role, you will champion Israels growing AI ecosystem, managing a high-performing team of Developer Relations Managers.

You will lead technical projects in GenAI/ML application development, consumer internet, and embedded AI systems. Working at the crossroad of engineering, strategy, and community, you will promote our hardware and SDK offerings. This role supports faster adoption of GPU-accelerated technologies by developers, startups, and ISVs. If you are a technically fierce, highly autonomous leader who thrives in a matrixed environment and wants to build the future of AI, let's talk.

What Youll Be Doing:

Lead & Mentor: Guide, collaborate and encourage a regional team of Developer Relations Managers covering Israel's dynamic AI ecosystem.

Drive Technical Strategy: Architect and complete a comprehensive developer adoption strategy for key industries, ensuring our platforms remain the gold standard.

Build Technical Alliances: Establish deep, positive relationships with CTOs, engineering leads, startups, and ISVs within the local ecosystem.

Evangelize & Accelerate: Act as the ultimate technical mentor and focal point for the developer community. Help developers unlock the full value of our SDKs and hardware to solve complex, real-world problems.

Champion the Community: Lead our presence at targeted developer events, hackathons, and industry activities.

Bridge the Matrix: Collaborate across internal product divisions, sales geographies, solution architects, and marketing teams to align our local ecosystem strategy with global value messaging.

We are seeking an energetic and versatile Principal Software Engineer to join our elite team responsible for building our Identity Directory Service and User Management platform. In this role, you will be a core technical authority using AWS architecture, AWS CDK, and .NET to design, develop, test, secure, and deploy high throughput, production ready cloud services from planning to production.
Working in full collaboration with security architects, product managers, and cross functional development teams, you will produce complex and advanced SaaS services that satisfy demanding scalability, security standards, and Non-Functional Requirements (NFRs).
Your Impact
System Architecture & Design: Lead the architectural design and system implementation of cloud-native, distributed microservices using AWS and .NET following secure-by-design principles.
SDLC Mastery: Practice all aspects of the software development lifecycle within an agile, continuous-delivery environment.
Research & Innovation: Spearhead research into modern cybersecurity mechanisms, evaluate emerging tech stacks, and pioneer cut-edge solutions to solve complex platform bottlenecks.
Technical Mentorship: Drive engineering excellence through code reviews, design discussions, and active coaching to uplevel engineers across the team.
Quality & Scalability: Participate in continuous and iterative engineering cycles with a heavy focus on code quality, testability, supportability, performance, and cost optimization.