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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Requirements:
Minimum qualifications:
PhD degree in Electrical Engineering, Computer Engineering, Physics, Materials Engineering, or Computer Science.
Relevant practical or internship experience, or personal project experience in hardware or electrical engineering.
Preferred qualifications:
Working knowledge of physical layer requirements for PCIe, Ethernet (IEEE 802.3).
Advanced proficiency in Python (NumPy, Pandas) for data analysis and instrument control.
Ability to correlate lab measurements with pre-silicon SI simulations (HSPICE, ADS, or Sigrity).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Edge-AI Verification Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with Architecture, Software, Design, and Physical Design stakeholders to make technical decisions and represent project status throughout the development process.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, a related technical field, or equivalent practical experience.
10 years of experience working with hardware verification languages (e.g., SystemVerilog/Specman), design verification methodologies (e.g., UVM) and chip design flow.
Experience in leading chip verification teams through the full lifecycle from concept to delivery.
Experience in creating chip or subsystem design verification strategies and plans.
Preferred qualifications:
15 years of experience in verification of complex SoC/ASIC.
8 years of experience managing verification teams.
Experience in verification of complex ISP (Image Signal Processing) designs.
Experience in chip design/verification of AI/ML logic.
Experience in Low Power Verification.
Experience with industry verification techniques, including complementary techniques such as Formal Verification, and Emulation.
This position is open to all candidates.
 
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8843833
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27/09/2026
Location: Haifa
Job Type: Part Time
looking for talented students to help us develop the semiconductor platform which is based on revolutionary architecture.
Take part in the development of innovative products within disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest Cloud provider, within a dynamic, open, and fast-paced environment. Our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.

Key job responsibilities
As Post Silicon Dev Student you will be exposed and learn wide range of expertise such as: C++ programing, hardware design, data mining, Verilog simulations, working with various high end test equipment and more
If paving new roads on edge of technology within a strong and dynamic team is what you seek, your place is with us.
Requirements:
Basic Qualifications
- BSc student of Electrical Engineering / Computer Engineering (with up to 3 semesters remaining before graduation).
- Please include a grade sheet/academic transcript along with your CV in a single PDF when submitting your application.
- Available to work 2-3 days per week.

Preferred Qualifications
- Familiar with chip design processes and debug techniques.
- Familiar with data mining and analyses techniques.
- Experience with C or C++ programing.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8833970
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead end-to-end signal integrity definition, channel budgeting, and stackup optimization for complex multi-die packages, including 2.5D (CoWoS, EMIB, InFO), 3D vertical stacking, and high-density organic substrates.
Architect and optimize multi-terabit interconnects across Die-to-Die (UCIe/BoW), host links (PCIe Gen6/7, PAM4/# SerDes), and memory subsystems (HBM3/4, DDR5, LPDDR6) in close collaboration with PHY and silicon design teams.
Build high-accuracy 3D full-wave electromagnetic models (HFSS) for micro-bumps, C4 bumps, TSVs, interposers, and BGA transitions, establishing automated flows for statistical eye/BER margin analysis.
Define high-frequency test vehicles, fixtures, and measurement methodologies; execute multi-port VNA, TDR, and real-time scope characterizations to correlate lab measurements with predictive simulations.
Collaborate closely with Silicon Design, Package Layout, Board/System, and external foundry/OSAT partners to resolve design trade-offs
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in Signal Integrity (SI), Power Integrity (PI), or high-speed hardware packaging.
Experience in electrical channel modeling, jitter budgeting, and return loss/crosstalk optimization for high-speed serial or parallel interfaces (e.g., PCIe Gen5/6, SerDes PAM4, DDR5, or Die-to-Die interconnects).
Experience with lab measurement equipment, including multi-port Vector Network Analyzers (VNA), Time-Domain Reflectometry (TDR), and high-bandwidth real-time oscilloscopes for simulation correlation.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience leading SI/PI technical architecture for server-class CPUs, high-performance AI accelerators (TPUs/GPUs), or multi-chiplet modules (MCM).
Experience developing automated EM extraction, layout parsing, and high-throughput statistical eye/BER margin analysis pipelines using Python, MATLAB, or Tcl.
Ability to lead cross-functional technical teams, mentor engineers, and drive technical roadmaps with external OSATs, substrate manufacturers, and foundries.
This position is open to all candidates.
 
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01/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
As a Digital Backend Design Engineer, you will be responsible for the physical implementation of digital designs from RTL to GDSII, leveraging cutting-edge EDA tools and methodologies. You will collaborate closely with RTL design, DFT, and packaging teams to achieve optimal performance, power, and area (PPA), while meeting stringent timing and yield targets.

Required Skills and Experience
Masters or PhD degree in Electrical/Electronic Engineering or a related field.

4+ years experience in digital IC backend implementation.

Proficiency with backend EDA tools, particularly Cadence Innovus and Genus.

Strong understanding of place & route (P&R), static timing analysis (STA), DRC/LVS verification, IR drop, and electromigration (EM) analysis.

Experience with advanced technology nodes (22nm or below preferred).

Skilled in Tcl scripting for automation of backend flows.

Experience in hierarchical or full-chip implementation is preferred.

Language: English at a proficient level. French is a plus.
Requirements:
Execute full-chip and block-level physical design tasks including floorplanning, placement, clock tree synthesis, routing, and physical verification.

Develop and optimize the digital backend flow.

Drive timing closure, power optimization, and physical verification (LVS/DRC/ERC).

Collaborate with front-end designers to address timing and logical/physical interface issues.

Support tapeout preparation and final signoff processes.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8839543
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Location: Jerusalem
Job Type: Full Time
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Requirements:
Minimum Qualifications
3+ years of experience in physical design of large-scale SoCs.
B.Sc / M.Sc Electric Engineering / Computer Engineering.
Extensive experience with one of the place & route tools (Synopsys / Cadence).
Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages.

Preferred Qualifications
Knowledge in Verilog - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Caesarea
Job Type: Full Time
Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.
Requirements:
B.Sc. in Electrical or Computer Engineering.
6+ years of experience in post-silicon validation, characterization, or hardware testing.
Experience testing and measuring boards using scopes, VNAs, TDRs, and phase noise analysers.
Experienced in bringing up ASICs on EVBs, specifically with SerDes and DC/DC channels.
Ability to write automated scripts for hardware testing and data analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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28/09/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class STA (Static Timing analysis) Physical Design Engineers to join our outstanding Networking DFT team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:
DFT STA execution, from rtl driven constraints and definitions through DFT constraints quality assurance to STA sign-off.
Be part of a unique team of experts who have deep understanding in all aspects of pre and post silicon.
Be exposed and work on a variety of challenging designs, unique DFT solutions that require deep silicon implementation understanding.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part in flows development.
Requirements:
What we need to see:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise

Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Knowledge in DFT flows such as ATPG, Mbist, Ijtag.
Prior experience in DFT timing closures.
Knowledge in CDC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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28/09/2026
Location: Herzliya
Job Type: Full Time
Power the Future with us! we are a global leader in high-performance smart energy technology, with over 3000 employees, offices in 33 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. The Embedded Infrastructure Team builds and maintains the shared Embedded software foundations used across the department. We develop reusable code and core technologies that enable multiple projects and teams to succeed, while spearheading the adoption of new technologies within the organization. By providing a robust, scalable base, we empower product teams to move faster with confidence. Key Responsibilities
* Develop and maintain Embedded software for a cross-platform SDK at the core of our company Embedded products.
* Develop bootloaders, drivers, bare-metal, and RTOS-based firmware for ARM & ARC processors.
* Collaborate across software, hardware, and architecture teams to develop and integrate features, from design through implementation and system -level validation.
* Participate in design reviews/code reviews and develop high-quality code following best practices, including unit tests and automated system tests.
* Define and improve development environments and build flows that enable efficiency and flexibility across all teams.
* Navigate a hardware-oriented environment encompassing chip bring-up, physical device integration, complex troubleshooting, and software-hardware validation.
* Apply AI-driven tools and methodologies to accelerate development and enhance code quality.
Country:
Israel
City:
Herzliya
Requirements:
Basic Qualifications
* B.Sc. in Computer Science, Electrical Engineering, or equivalent experience.
* At least 5 years of experience in Real-Time Embedded systems firmware development using C / C ++.
* Hands-on experience in development and troubleshooting on Embedded micro-controllers and processors.
* Experience with firmware debugging tools such as JTAG and logic analyzers.
* Strong problem-solving skills and attention to detail.
* Experience with Embedded peripheries drivers (UART, SPI, I2C, ADC, PWM, Timers, DMA).
* Excellent teamwork skills, flexibility, and ability to handle multiple tasks.
* Ability to quickly learn and adapt to new technologies and domains.
* Familiarity with multi-threaded and/or RTOS-based systems. Preferred Qualification
* Experience with AI-driven development tools and workflows
* Hands-on experience with communication protocols such as CAN-FD, Ethernet, or TCP/IP.
* Experience developing tools and scripts for automation using Python or other scripting languages.
* Experience with CI/CD pipelines (Gitlab CI, Github Actions, Jenkins, etc) and automation workflows.
* Familiarity with command-line build systems such as CMake, Bazel, Meson, etc.
our company recognizes its talented and diverse workforce as a key competitive advantage. Our business success is a reflection of the quality and skill of our people. we are committed to seeking out and retaining the finest human talent to ensure top business growth and performance.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
the company was founded by the team that invented one of the technologies at the heart of 5g. their next vision was to develop an iot sticker, a self-powered computing element that harvests radio frequency energy, bringing connectivity and intelligence to everyday products and packaging. this revolutionary combination of cloud and semiconductor technology is already being used by some of the worlds largest consumer, retail, food, and pharmaceutical companies to transform how products are made, distributed, sold, used, and recycled.
our investors include softbank, amazon, alibaba, verizon, ntt docomo, qualcomm, and pepsico.
were looking for a strong backend engineer to join us in building disruptive technology in the iot space. as part of our team, youll design and implement scalable management systems, solve complex problems, and shape the future of iot through innovative software solutions.
Requirements:
responsibilities:
design solutions for data intensive pipelines, considering large scale, high availability, security, robustness, performance, multi-cloud and multi-tenancy
provide high standard architecture, design and implementation
work with cross-functional stakeholders such as product management, additional SW engineers, architects and team leads
excel at all facets of the development life cycle: requirement analysis, coding, quality, ci/cd, tdd, integrations, deployment, monitoring
maintain highly reliable production operation
5+ years of software development industry experience.
education - bsc. in Computer Science or equivalent.
JAVA and spring boot experience.
flink/spark experience
kafka experience or equivalent
experience with microservices in cloud environments.
experience working with relational and nosql databases.
iceberg and lake architecture experience - advantage
excellent teamwork and communication skills.
high self-learning abilities.
strong interpersonal skills, high communication skills.
agentic development proficiency
This position is open to all candidates.
 
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30/09/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are at the forefront of the AI revolution, delivering brand new accelerated compute platforms for global impact. Our Network Architecture group is seeking a talented and motivated Sr. Software Engineer to build the agentic workflows that our architects use in their daily work. The software at the center of this role is our hardware network simulation environment - you will design multi-step agent workflows over it, engineer the context that grounds them in our own specifications and source code, and optimize their runtime performance. If you are passionate about building the practical infrastructure that brings intelligent agents to life, we want to hear from you.


What you'll be doing:
Build agentic workflows - loops, graphs, and multi-step pipelines - that carry real hardware network simulation and analysis work end to end.
Engineer the context these workflows run on, turning our simulation models, specifications, design documents, and source code into context that makes agents accurate in our domain.
Work closely with network architects to understand their workflows and translate them into agent workflows they use daily.
Optimize the runtime performance of our simulation tooling on these platforms, including execution time, compute cost, and end-to-end latency.
Define evaluation and regression testing for agent workflows, so that changes to a prompt, a graph, or a context source are measurable.
Build observability across agent runs: what the agent did, where it failed, and why.
Champion guidelines for secure and reliable agent workflows, including data handling, access control, and interaction boundaries.
Serve as a key technical resource for solving sophisticated integration issues between agents and internal tooling.
Requirements:
What we need to see:
B.Sc. or above in Computer Science, Computer Engineering, or a related field, or equivalent experience.
5+ years of hands-on experience in software engineering, with demonstrated ownership of production systems from design through deployment.
Expert-level programming skills in C++, with strong Python skills alongside it.
Strong understanding of the full stack, including hardware: memory, I/O, networking, accelerators, and where real performance bottlenecks occur.
Current, practical knowledge of how to build systems around AI models: agent loops, tool interfaces, context retrieval and management, and common failure modes.
Understanding of inference serving, including request lifecycle, batching, caching, and the tradeoffs between throughput, latency, and cost.


Ways to stand out from the crowd:
Experience writing hardware simulation software - network, system, or architectural simulators, models, or testbenches.
Networking experience - protocols, fabrics, switching, or RDMA - and experience working alongside silicon, systems, or architecture teams.
Hands-on experience with inference serving engines such as vLLM, TensorRT-LLM, or Triton Inference Server, including low-level internals such as KV cache, batching and scheduling, and quantization, and related performance work such as profiling and GPU programming.
Hands-on experience building or fine-tuning LLMs or other generative models.
Agent workflows, tooling, or context pipelines adopted by other engineering teams.
This position is open to all candidates.
 
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15/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We're looking for an exceptional, hands-on leader-engineer to join our core engineering team as a true force multiplier and technological anchor for the company. You'll have the flexibility to drive high-impact initiatives from conception to production, own complex technical and AI domains end-to-end, or guide and level up a focused delivery team, operating with a high degree of autonomy in an ambiguous, fast-moving environment.
What You'll Do:
Drive strategic initiatives: lead complex technical projects, AI feature developments, and core architectural components with an ownership mindset.
Architect for AI & data at scale: design robust, scalable infrastructure and pipelines capable of handling massive volumes of cloud infrastructure data.
Bridge product, AI & tech: collaborate closely with Product Managers and data specialists to translate business roadmaps into high-performance technical systems.
Promote engineering excellence: establish development guidelines, lead design and architecture reviews, and raise the bar for code quality across teams.
Mentor & guide: act as a technical mentor to fellow engineers through hands-on collaboration, deep code reviews, and architectural consultation.
Requirements:
8+ years of experience in backend software engineering, with a proven track record designing, building, and operating large-scale cloud production systems.
Strong coding fundamentals in backend technologies such as Go, Python, Java, etc.
Experience leveraging AI coding agents (e.g., Claude Code) and implementing AI-oriented workflows to enhance team productivity and code quality.
Production-grade experience with AWS, containerization (Kubernetes/Docker), microservices, and distributed databases/data warehouses (e.g., PostgreSQL, Snowflake).
Practical experience working with large data volumes, data pipelines, or integrating AI/LLM technologies into production environments.
Demonstrated experience leading technical workflows, driving complex cross-team initiatives, or acting as a full-lifecycle domain owner.
A true independent operator who thrives in fast-paced environments and solves problems end to end.
Ability to build technical consensus, inspire peers, and drive alignment across stakeholders.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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04/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Join our company's Threat Prevention group and help shape the next generation of cyber security technologies.
We are looking for a highly technical and passionate Team Leader to lead the development of advanced Threat Prevention solutions, including next-generation security engines powered by AI and machine learning.
In this role, you will lead a team of engineers responsible for designing, building, and scaling innovative security technologies that protect organizations against modern cyber threats. You will combine strong technical leadership with hands-on development, working closely with architects, researchers, product teams and customers to deliver cutting-edge security capabilities.
Work on core technologies that protect millions of users worldwide.
Lead the development of next-generation Threat Prevention and AI-based security engines.
Influence product strategy, architecture, and innovation.
Be part of one of the industry's leading cybersecurity organizations.
Key Responsibilities
Lead and mentor a team of talented software engineers
Drive the design and development of advanced Threat Prevention technologies and security engines
Lead the development of new AI-powered detection and prevention capabilities
Own the team's technical roadmap, architecture, and execution
Take an active hands-on role in the design and implementation of core system components
Build highly scalable, high-performance backend solutions focused on security, reliability, and operational excellence
Drive innovation and introduce new technologies, methodologies, and security approaches.
Develop backend components using C++, C, and Python.
Requirements:
2+ years of experience leading software development teams
Extensive experience designing and developing large-scale software systems
Solid networking knowledge
Experience in cybersecurity, threat prevention, network security, or related domains - a significant advantage
Self-driven, innovative, and passionate about technology.
Very high technical competence with approximately 50% hands-on involvement.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8840716
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Location: Ramat Gan
Job Type: Full Time
Required Solution Engineer (Pre-Sales)
About The Position
A modern, full-stack observability platform transforming how businesses process and understand their data. Our unique architecture powers in-stream analytics without reliance on expensive indexing or hot storage. We specialize in comprehensive monitoring of logs, metrics, trace and security events with features such as APM, RUM, SIEM, Kubernetes monitoring and more, all enhancing operational efficiency and reducing observability spend by up to 70%.
Solution Architects are key in meeting our customers expectations and helping them utilize their observability and security data. We are looking for hard-working, sharp, and humble professionals with proven technical customer-facing experience. Our architects are trusted advisors and consult our customers upon their monitoring, security & observability journey.
Solution Architect is a senior-level role expected to professionally and accurately present technical presentations across different personas, from software engineers and DevOps all the way to the C-suite.
What youll do:
Collaborate with account executives to strategize, prepare, and execute on complex, technical sales cycles.
Deliver compelling presentations and product demonstrations that highlight our unique value proposition and the solutions we provide.
Oversee the technical aspects of the sales process, including sizing, discovering and Proof of Concepts.
⁠Develop custom solutions to bridge any gaps and enhance the core offerings of our product.
⁠Possess a thorough understanding of the Observability market, advising customers on best practices and the most appropriate solutions for their needs.
Requirements:
⁠Minimum 5 years of experience in a customer-facing role such as pre-sales, solutions engineering or technical architecture.
Exceptional communication and presentation skills.
Proven ability in technical integrations and conducting POCs.
⁠In-depth knowledge of Kubernetes, AWS, Azure, GCP, Docker, Prometheus, OpenTelemetry.
Background in Engineering/DevOps will be considered an advantage.
Previous experience in Technical Sales of Observability, Monitoring, APM, RUM, SIEM is desirable.
Proficiency in coding with high-level programming languages (Java, Go, Python) - advantage
⁠ ⁠Candidates should have hands-on experience and the ability to integrate these technologies into customer environments, providing tailored solutions that meet diverse operational requirements.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8836022
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Location: Petah Tikva
Job Type: Full Time
We are seeking an energetic and versatile Principal Software Engineer to join our elite team responsible for building our Identity Authentication platform. Driving the modernization of core, mission-critical authentication domains across our primary product, delivering massive impact at scale. In this role, you will be a core technical authority using AWS architecture, AWS CDK, and .NET to design, develop, test, secure, and deploy high throughput, production ready cloud services from planning to production. Working in full collaboration with security architects, product managers, and cross functional development teams, you will produce complex and advanced SaaS services that satisfy demanding scalability, security standards, and Non-Functional Requirements (NFRs).
Your Impact:
Lead the architectural design and system implementation of cloud-native, distributed microservices using AWS and .NET following secure-by-design principles.
Practice all aspects of the software development lifecycle within an agile, continuous-delivery environment.
Spearhead research into modern cybersecurity mechanisms, evaluate emerging tech stacks, and pioneer cut-edge solutions to solve complex platform bottlenecks.
Drive engineering excellence through code reviews, design discussions, and active coaching to uplevel engineers across the team.
Participate in continuous and iterative engineering cycles with a heavy focus on code quality, testability, supportability, performance, and cost optimization.
Requirements:
Your Experience:
Bachelors or Masters Degree in Computer Science, Software Engineering, or related technical field / IDF elite technology unit alumni.
15+ years of hands-on software development experience with extensive background in .NET / C# (or Java/Go/Python) within cloud-based microservices environments.
Passionate about system design, high-quality code, peer code reviews, performance optimization, and challenging the status quo.
Deep understanding of cloud architecture patterns, RESTful APIs, asynchronous workflows, and event-oriented design.
Proactive by nature with an internal drive for engineering excellence, self-direction, and problem-solving.
Excellent written and verbal communication skills in English with the ability to articulate complex architectural decisions simply.
Preferred Qualifications:
Extensive experience building enterprise-scale SaaS applications using AWS services and Infrastructure-as-Code (AWS CDK or Terraform).
Solid understanding of security protocols, networking best practices, and Identity & Access Management concepts (directory services, SSO, OAuth2/OIDC, SAML).
Hands-on experience with modern CI/CD automation tools (GitHub, Jenkins, Artifactory) and containerization ecosystems (Docker, Kubernetes, OpenShift).
Build end-to-end features using models from providers like OpenAI, Anthropic, or open-source ecosystems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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