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We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.

Responsibilities:
Define and drive the design of advanced blocks from micro-architecture phase to netlist.
Support timing and constraints definitions work closely with the BE team on timing and physical implementation efforts.
Leading processes relating to power optimization.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
Design and build tests to verify that the System on a Chip (SoC) design meets those goals.
Develop and implement advanced technologies for running "benchmark representations" on pre-silicon environments.
Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre- and post-silicon environments.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.

As a member of our physical design team, you will be performing various electrical analyses at the block or chip level, including but not limited to Static/Dynamic IR, EM, Noise, and Signal EM.
You will work with the CAD/technology teams for flow bring-up and validation.
You will also collaborate with the implementation team during the entire chip design cycle to drive sign-off closure for tape-out.
You will handle schedules and support cross-functional engineering efforts.

The production TEST team - responsible for the definition, development, and deployment of production TEST operations for the worlds most advanced socs for adas and self-driving vehicles.
this is your opportunity to join a team during its initial forming stage and leave your mark as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
what will your job look like?
work closely with design and TEST engineers from the earliest development phases to review chip electrical and mechanical specifications and define the hardware architecture and requirements for load boards (lb) and probe cards (pc).
lead and oversee all aspects of lb and pc development, including schematics, bom selection, pcb layout, pi/si simulations, and mechanical design.
define, guide, and validate testsocket requirements, specifications, design, and electrical performance.
establish electrical and mechanical specifications for custom RF modules integrated into the complete TEST system architecture.
manage supplier interactions and logistics, ensuring accurate tracking of manufacturing status, delivery schedules, Quality Assurance, and repair/rma processes.
own hardwarereadiness activities, including validation, qualification, and release of TEST hardware into engineering and production environments.
support postsilicon testprogram debug efforts, resolving hardwarerelated issues and enabling timely delivery of samples to internal and external customers.

We are seeking a Digital Electrical Design Engineer with extensive experience in board-level digital design, high-speed interfaces, and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D team-guiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites. While prior quantum or cryogenic experience isnt required, an interest in learning about these cutting-edge fields is a plus.
Key Responsibilities:
Digital Board-Level Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
End-to-End Development: Own the entire hardware lifecycle-from concept and schematic design in Altium to layout review, testing, and production release.
Design for Manufacturing & Test (DFM/DFT): Integrate manufacturing and testing considerations into your designs, collaborating with supply chain and production teams to ensure scalability and cost-effectiveness.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardware-firmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.

We are looking for an experienced STA Lead Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.
Responsibilities:
Take part in STA activities for blocks, Sub Systems and Full chip, from definitions to TO.
Analyze timing results, verify correctness and provide timing budget for the different partitions.
Own the timing constraints both for STA and P&R flow.
Working closely with architecture, design, PD and DFT teams to make sure timing closure and ensures product success.
Identify risks and bottlenecks, work closely with PD, RTL and DFT teams, ensuring convergence throughout various project stages.
Participating in design methodology, reviews and tool automation work and definition.
As part of this rule you will gain very good understanding of our HPC and AI designs and sub system as well as product targets.

which department will you join?
our hw team - a group designing the eyeq chips for adas and autonomous cars. the group is responsible for all disciplines of development, including but not limited to logic design, design verification, microarchitecture, analog and circuit design and layout, physical and structural design ( backend ), product and TEST engineering.
each physical design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & rtl modifications to achieve converges were looking for a physical design engineer to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

We are looking for a Senior ASIC Physical Design Engineer to join our dynamic team, Join the ride as we spearhead the next revolution in electronics!
What Youll Do
Own and continuously improve our smooth product backend integration methodology, flows, and best practices using Cadence and Synopsys tools.
Develop, maintain, and scale automation and infrastructure (TCL / Python) to improve quality, predictability, and turnaround time.
Collaborate closely with multiple teams to ensure smooth handoffs and high-quality product.
Support field teams on complex technical issues when needed.
Responsibilities
Implementation of ASIC units using advanced flows
Developing BackEnd methodology using Cadence and Synopsys tools
Build and develop scripts for physical design implementation
Support Field team with customer issues.

We are looking for a Senior ASIC Physical Design Engineer to join our dynamic team, Join the ride as we spearhead the next revolution in electronics!
What Youll Do
Own and continuously improve our smooth product backend integration methodology, flows, and best practices using Cadence and Synopsys tools.
Develop, maintain, and scale automation and infrastructure (TCL / Python) to improve quality, predictability, and turnaround time.
Collaborate closely with multiple teams to ensure smooth handoffs and high-quality product.
Support field teams on complex technical issues when needed.
Responsibilities
Implementation of ASIC units using advanced flows
Developing BackEnd methodology using Cadence and Synopsys tools
Build and develop scripts for physical design implementation
Support Field team with customer issues.

In this role, you will lead major customer engagements, both remotely and on-site, and tackle the most complex challenges faced by our customers. Some of these challenges will be addressed in-house by designing and developing tailored solutions for customer environments. Others will require close collaboration with our R&D and Product teams to deliver scalable and impactful solutions.
This position is ideal for someone who enjoys solving hard technical problems while working directly with customers and influencing product direction.
Responsibilities
Drive AI Security deal success by handling complex technical sales engagements.
Lead and participate in customer meetings, including technical deep dives, solution design sessions, and executive-level discussions, both remotely and on-site.
Collaborate closely with cross-functional teams, including Sales, Product, R&D, Marketing, Customer Success, and Professional Services, to deliver end-to-end customer solutions.
Design and develop custom features, integrations, and tailored solutions to address customer-specific environments and challenges.
Lead and support complex customer deployments, from initial design through implementation and validation.
Act as a hands-on technical expert throughout the customer lifecycle, contributing wherever needed to ensure successful outcomes.

Join CIO Architect team and shape the future of AI! We're seeking a hands-on AI Solutions Lead to lead the development and implementation of enterprise-wide AI applications. In this pivotal role, you'll evaluate and deliver cutting-edge AI solutions to employees and teams across the organization. You'll spearhead AI solution projects from initial concept and requirements gathering through execution and widespread adoption, serving as the central point of contact between business, IT, and Data teams. You'll also stay at the forefront of the latest AI technologies.
As an AI Solutions specialist (CIO Group) you will
Collaborate with cross-functional teams to diagnose challenges and opportunities where GenAI and AI Agent can provide real, measurable value.
Lead the lifecycle of GenAI-driven applications and Autonomous Agents, transitioning rapidly from initial concept and technical feasibility to full enterprise-grade production roll-outs.
Conduct technical audits of emerging AI technologies, leading "Build vs. Buy" analyses to ensure global scalability, security, and measurable value to the organization.
Run training and enablement sessions for both technical and non-technical teams, fostering a culture of AI literacy and ensuring the organization can leverage new tools effectively.
Build and evolve the Enterprise AI technology stack, continuously scouting and integrating next-generation platforms, LLM orchestration tools, and agentic frameworks.
Serve as the primary technical liaison between IS, IT, Legal, and Data teams to ensure AI solutions are securely integrated and compliant with enterprise standards.
Own the long-term roadmap and administration of enterprise AI platforms, driving continuous solution adoption, impact measurement, and performance optimization across the organization.

We are looking for a highly technical, customer-obsessed Senior Technical Leader to define and drive the usability, integration standards, and provisioning for these cutting-edge technologies. In this role, act as the technical champion for the DPU, ensuring our software stack and tools are robust, performant, and intuitive from day one. By bridging the gap between core R&D and real-world deployments, this position directly shapes how seamlessly the world's largest data centers adopt our platform.


What youll be doing:

Own the end-to-end BlueField and DOCA lifecycle, from out-of-the-box installation and configuration through field updates, provisioning, functionality, documentation, and performance.

Act as the essential bridge between R&D and the real world by collecting operational feedback from customers and internal stakeholders (developers, architects, integration teams, and QA).

Translate complex deployment friction points and customer pain points into actionable engineering requirements and architectural direction.

Perform hands-on prototyping, scripting, and system-level validation-installing the product, reproducing scenarios, and analyzing logs-to continuously elevate the platform.

Collaborate deeply with Core R&D, QA, and Solutions Architecture to guarantee new features meet strict usability standards.

we are looking for a Developer Advocate.
This role sits at the intersection of engineering, product, and the global developer community. Youll translate technical work across all domains, repositories, security, release management, pipelines, distribution, metadata, AI/ML, and ecosystem integrations, into content, demos, talks, and conversations that developers trust. Youll also bring community insights back into R&D and business teams to influence product direction.
As a Developer Advocate you will:
Represent across developer, DevOps, security, and platform-engineering communities through conferences, meetups, webinars, podcasts, and online conversations
Create high-quality technical content: deep-dive articles, demos, hands-on guides, screencasts, code samples, and social content
Build compelling demos and storytelling around core domains: Artifactory, Xray, Curation, Distribution, Pipelines, Workers, Fly, AI/MCP, and ecosystem integrations like GitHub
Collaborate closely with R&D, Product, Security, Solutions Engineering, Architecture, and Customer Success to deeply understand new capabilities and provide practical feedback
Engage with open source and developer communities, finding new channels and conversations where should have a voice
Partner with Marketing to strengthen messaging while preserving technical credibility
Monitor and report impact across community engagement, content performance, OSS participation, and broader DevRel KPIs