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Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
Design and build tests to verify that the System on a Chip (SoC) design meets those goals.
Develop and implement advanced technologies for running "benchmark representations" on pre-silicon environments.
Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre- and post-silicon environments.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.

In this role, you'll guide a team of experienced engineers and team leads, coordinating execution across multiple product lines. You'll have a direct impact on our networking products-from VR72 to next-generation AI fabric solutions-and play a key role in scaling our capabilities while pioneering AI-enhanced workflows.

What you'll be doing:

Guide day-to-day execution across multiple concurrent product lines, with ownership of firmware debug and validation delivery.

Mentor and develop team leads (currently 3 direct reports), helping them grow their technical and leadership capabilities while thoughtfully allocating resources across priorities.

Collaborate with teams across Chip Design, Software, Architecture, QA, and Applications to solve technical challenges together.

Encourage AI adoption and explore AI-enhanced workflows that improve team effectiveness.

Help translate customer needs into meaningful product improvements.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a research and development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with strategic value add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for a talented and experienced Physical Design lead to take part in the physical design and help lead the companys BE activities . This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on our final product
Responsibilities:
Lead blocks and sub systems execution from RTL to GDSII.
Clearly reflect status and execution metrics and help identify and solve execution bottlenecks.
Spec and define full floor plan, including pin placement, partitions, and power grid
Develop and validate high-performance, low-power clock network guidelines
Perform critical block-level place and route and create designs that meet PPA targets.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations
Work with vendors on defining physical design methodologies and assist in flow development for chip.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full life-cycle of verification which can range from verification planning, test execution or collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include our companyrs, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.

Required Senior ASIC Frontend Design Engineer
Yokneam Full-time Senior
We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities
Join a team of VLSI frontend design engineers in our projects.
Define, plan and implement our next chip in our on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.

As a Senior Software Architect in the Accelerated Computing System and Software team, you will define Software Defined Networking (SDN) architectural solutions and be part of a team of specialists who span across numerous technological fields related to the modern data center, such as distributed AI and deep learning systems, High Performance Computing (HPC), Networking Operating Systems, Virtualization, Storage, and more.

What youll be doing:

Define system and software architecture for Software Defined Networking (SDN) of ground breaking emerging AI and HPC networks which involves innovative software and hardware.

Be an active member in setting the use-cases and metrics for Monitoring Complex High-speed Networks Control-plane.

Work closely with various groups within NVIDIA to bring AI and HPC network technologies to reality, including GPU and Switch HW and SW teams, Product as well as fellow architects.

Are you a tech-savvy problem solver with a passion for embedded systems? We are looking for a Senior Embedded Engineer to lead the design and optimization of next-generation software for advanced networking solutions. This position offers more than just a coding job, its an opportunity to lead projects, tackle significant challenges, and make an impact in a fast-paced, agile environment.
What You'll o:
System Architecture & Design:
Define, design, and oversee system architecture for embedded systems, including Linux internals and bootloaders.
Ensure systems meet performance, reliability, and scalability requirements for cutting-edge applications on routers.
Development & Optimization:
Develop, debug, and optimize embedded C software and kernel modules.
Architect and refine software for networking technologies, ensuring low latency and secure performance.
Drive code quality through hands-on coding, code reviews, and adherence to industry best practices.
Project Management:
Oversee the full development cycle, from concept through deployment, managing timelines, milestones, and resources.
Collaborate with cross-functional teams, including hardware, firmware, and network engineers, to align product goals and technical roadmaps.

seeking a skilled Salesforce Solution Architect to join our team. As a Salesforce Solution Architect, you will design and implement Salesforce solutions for our clients. You will collaborate with various stakeholders to understand business requirements and translate them into scalable and efficient Salesforce solutions. The ideal candidate will have a solid technical background in Salesforce, with demonstrated expertise in architecture design and implementation. We want to hear from you if you are passionate about Salesforce and enjoy working in a dynamic and challenging environment.

Responsibilities:

Designed and implemented Salesforce solutions for clients, ensuring scalability, efficiency, and best practices
Collaborate with stakeholders to understand business requirements and translate them into technical solutions
Lead and participate in project planning and estimation activities
Provide guidance and mentorship to development teams on Salesforce best practices and design patterns
Collaborate with cross-functional teams to integrate Salesforce solutions with other systems
Identify and resolve technical issues and challenges, driving continuous improvement and optimizing Salesforce solutions
Stay up-to-date with Salesforce platform updates, new features, and industry trends to provide innovative and effective solutions

We at our company Networking Solutions Labs seek a forward-thinking, innovative, and experienced Solutions Architect with hands-on experience.
By joining the team, youll take a part in the design and implementation of complex data center solutions, including solution architecture, HW and SW deployment, performance, and return on investment analysis. You will work with software developers and architects to research and analyze new, groundbreaking technologies.
The candidate is expected to have hands-on experience with data center technologies, including operating systems, virtualization and containerization technologies, storage, networking, and infrastructure as code (IaC) tools such as Ansible. A candidate for this position must excel at working independently as well as in a group, in a multidisciplinary, dynamic environment.
What youll be doing:
Implement cutting-edge, end-to-end data center solutions with modern applications.
Architect, develop, deploy, automate, analyze, formalize findings, and release summary reports.
Develop and release reference deployment guides and how-to tutorials.
Support company business units on complex solutions delivery by consulting, providing solutions designs, running POCs, etc.
Research technology trends and deliver best practices for integrating our company products and technologies.

we are a game changing software company, backed by US private equity investors, and headquartered in NYC. We are building a suite of digital applications on the Salesforce platform. We connect brands, technology and people to create new growth and business value faster.
The Role
If you have the ambition to join an exciting, fast-growing, modern tech company, and have been seeking the ideal opportunity to do something new and interesting, then we are for you.
our company, the provider of cloud-based solutions for the retail and healthcare industries, is currently looking for a Sr. Software Architect to be part of the Product Development team. As one of the members of our Product team, you will be working closely with the product managers to design and lead the development of our Bayretail & Bayhealthcare solutions. You will be responsible for leading and growing our multicultural Product Development team. You will also be supporting the sales process by understanding our customers technology landscape and providing guidance for the implementation of our solutions.
At our company, we offer excellent opportunities for our people to capitalize on their skills and grow in a fast-paced, unique, and exceptional work environment.
What Youll Do
Drive the execution and delivery of product features by collaborating with cross-functional teams
Lead key engineering initiatives to improve overall engineering effectiveness and productivity
Iteratively define and refine development processes and engineering best practices as teams grow
Recruit, challenge, and reward high-performing software engineers and managers.
Work in an agile, small team environment with a focus on speed and quality
Be a trusted partner for senior management to determine the best solutions, help drive alignment and implement decisions throughout your team
Pre-sales Support; including solution workshops and POCs, written responses, and relationship building.