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Required Senior Technical Program Manager, Chip DevOps and Methodology
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
As a Technical Program Manager for Chip DevOps, you will orchestrate the delivery of the foundational engineering environment and drive the execution of a unified silicon design methodology across our engineering organization. You will own the lifecycle of programs that scale our Electronic Design Automation (EDA) toolchains, optimize massive cloud compute grids, and establish standardized, automated workflows.
This is a highly cross-functional role requiring a unique blend of modern cloud infrastructure expertise, semiconductor workflow awareness, and agile program management. You will partner closely with Design, Verification, CAD, and Infrastructure teams to eliminate fragmented workflows, implement standardized methodologies, and ensure a seamless, high-performance environment to build next-generation chips.
Our Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to our Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Manage programs the definition, standardization, and company-wide adoption of a unified design and verification methodology. Drive alignment on consistent coding standards, automated checks, PDK management, and IP reuse protocols.
Define, manage, and deliver complex infrastructure and CAD roadmaps, ensuring projects are completed on time, within budget, and with minimal disruption to design timelines.
Manage programs the deployment, licensing, and scaling of EDA tools (e.g., Synopsys, Cadence, Siemens) across hybrid or fully cloud-based environments, ensuring tool flows strictly adhere to the unified methodology.
Lead initiatives to optimize compute infrastructure (high-performance computing clusters, storage, and cloud instances) to handle massive simulation, synthesis, and physical design workloads.
Drive the strategy and implementation of automated workflows, continuous integration, and continuous verification (CI/CD) pipelines.

Required Design and Power Methodology Manager, Servers, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
As a Design and Power Methodology Team Manager within the Server Chip Design team, you will be responsible for managing and leading design and power methodologies from IP to SoC, pre and post silicon. You will be responsible for mentoring and developing team members and tech leads while driving improvements in leadership, technical execution, and design flows.
You will work closely with CAD vendors and internal teams to develop lead design and power methodology and execution.
Responsibilities
Manage a team of tech leads and designers. Develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
Lead flow and methodology development and assimilation across multiple groups. Work closely with CAD tool providers as well as internal CAD teams.
Plan, execute, track progress, assure quality, and report status.
Work closely with internal customers and support multiple activities and deliverables.
Drive design methodologies such as design construction, CDC, RDC, SDC. Drive power at: IP and SoC RTL/Gate Level Optimization, estimation, correlation.

Required Senior Design Engineer, Cloud Networking
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHSIC Hardware Description Language (VHDL)), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Required DFT Engineer
Job Description
Meet the Team
We are a leading Design for Test (DFT) group, delivering End-to-End solutions for our flagship products, including CiscoSilicon One!. Our chips are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance.
Our team operates in a hybrid model, with three days a week in the office in Azrieli Tower Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation!.
Your Impact
Expand Your Scope- we provide engineers from different backgrounds the environment to master, standardize and evolve across different features.
Lead hands-on execution from pre-silicon design to silicon bring-up and production.
Collaborate with architects and verification teams to define the DFT roadmap for our next-gen Silicon One chips.

Required ASIC Design Engineer - Silicon One
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required SoC DFT Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design for Test (DFT) Engineer, you will be responsible for defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design and verify the DFT logic and prepare for post silicon and co-work/debug with test engineers.
Responsibilities
Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG), hierarchical DFT).
Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic Built-In Self Test, Test Access Point (TAP) controller, clock control block, and other DFT IP blocks.
Insert MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
Document DFT architecture, test sequences, and boot-up sequences associated with test pins.

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Junior Silicon DFT Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design for Test (DFT) Engineer, you will be responsible for defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design and verify the DFT logic and prepare for post silicon and co-work/debug with test engineers.
Responsibilities
Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG), hierarchical DFT).
Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic Built-In Self Test, Test Access Point (TAP) controller, clock control block, and other DFT IP blocks.
Insert MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
Document DFT architecture, test sequences, and boot-up sequences associated with test pins.

We are looking for an Embedded Software Engineer for performance verification and profiling.
You will join the Virtual Platforms and Performance Verification team in the EyeQ Platform Group (EPG), working on current and next-generation ADAS/AV systems.
Virtual platforms, performance models, and profiling tools are core components of the EPG infrastructure. These tools are used during the pre-silicon phase for hardware architecture optimization and software development, and in the post-silicon phase for software performance optimization.
What will your job look like:
Performance verification of EyeQ SoC designs
Development of hardware virtual platforms
Running hardware benchmarks and correlating virtual platform results with silicon measurements
Development of tracing and profiling tools for CPU performance analysis and optimization
Close collaboration with hardware architects and software, OS, and algorithm teams.

The Architect leads the design and implementation of scalable AI platforms and central services for AI, creating shared capabilities, tools, and frameworks that transform how our company builds, delivers, and operates products.
Beyond architecture, this role drives strategic, high-impact projects with powerful ROI that positively disrupt operations and elevate customer outcomes, improving efficiency, innovation, and product value across the company.
Strategic Objectives:
Accelerate AI Transformation across the organization by designing and operationalizing central AI services and a unified platform framework that powers key transformation initiatives, including Agentic Workflows.
Institutionalize AI Engineering and Governance Standards through common architecture, services, and enablement frameworks ensuring scalability, security, quality, and compliance.
Deliver measurable transformation outcomes through strategic, ROI-driven projects that reshape how our companys products are built and operated, directly benefiting customers and business performance.
Drive sustainable transformation at scale, balancing rapid innovation with operational excellence and long-term maintainability.
Key Responsibilities
Architect the AI Transformation Framework
Design and own the end-to-end architecture that enables the companys AI Transformation vision - spanning data, models, pipelines, APIs, and governance layers.
Define blueprints and integration standards to embed AI and automation throughout the SDLC, from ideation to delivery.
Build Generative AI Platforms and Central Services
Lead the design and implementation of the AI Enablement Platform and central AI services powering transformation initiatives such as Agentic Workflows and the Knowledge Hub.
Create scalable, secure, and modular AI components that can be leveraged across product lines and engineering domains.
Partner with infrastructure, platform, and security teams to operationalize LLM-based services, retrieval systems, and agentic automation flows.
Drive Strategic Transformation Projects
Lead cross-functional initiatives that deliver tangible operational and business impact - improving speed, quality, and cost-efficiency across the product organization.
Develop strong business cases and ROI frameworks to prioritize and communicate transformation value at the executive level.
Translate successful outcomes into reusable playbooks and AI cookbooks that scale across teams, roles, and product domains.
Technical Leadership and Enablement
Act as the senior technical authority and coach for AI transformation initiatives, guiding teams through architecture reviews, proofs of concept, and scale-up phases.
Mentor internal architects and tech leads to develop AI-native architectural competencies.

We are looking for a Senior Data Architect to help define and evolve the data architecture of our SaaS platform and core products. You will work closely with product, delivery, and engineering squads to design scalable, reliable data systems, set technical direction for how data is ingested, modeled, stored, and served, and guide teams in making high-quality architectural decisions that balance delivery speed with long-term sustainability.
This is a hands-on, senior technical leadership role: you will spend most of your time shaping data architectures with teams, reviewing data models, pipelines and critical code, and driving shared standards and patterns across the organization, all in an advanced agentic environment.
Responsibilities:
Define and evolve the data architecture for key domains (ingestion, ELT/ETL, data modeling, storage, APIs, integration, observability, governance, and security), including owning the lakehouse/medallion architecture (bronze/silver/gold) and the data flows that move data across layers at scale.
Translate business and product requirements into pragmatic data designs, data contracts, and architecture roadmaps; create and maintain architecture artefacts (data flow/lineage diagrams, ADRs, reference implementations, modeling guidelines).
Evaluate design options and technology choices, articulate trade-offs, and lead decision-making with stakeholders; push forward the agentic mindset and implementation across the data platform.
Partner with squad leads and senior engineers to design data solutions, break down complex problems, and keep implementations aligned with the target architecture; participate in design/tech reviews to ensure NFRs (performance, scalability, data quality, resilience, security, operability) are addressed early.
Provide hands-on support where it matters most: spike and prototype critical data flows, review complex PRs, and help debug tricky production data and pipeline issues.

Responsible for designing, implementing, and maintaining security systems within an organizations network. The role requires a deep understanding of organizational technology and systems, providing technological solutions to existing challenges, and ensuring alignment with organizational processes and structure.

we are looking for a technically sharp, customer-focused Solutions Architect to help drive adoption of our blazing-fast real-time data platform. In this high-impact role, youll partner closely with our sales team to win business by translating complex technical capabilities into clear, compelling value for our customers.
Based in Israel, youll serve as the technical expert and strategic advisor throughout the sales process - from discovery to demo to deployment. Whether its architecting a high-scale solution, answering in-depth questions, or running a proof of concept, your expertise will be key to helping customers realize the power .
This is a pre-sales position.
Responsibilities:
Preparing and developing technical presentations to explain our company's products or services to customers.
Discussing equipment needs and system requirements with customers and engineers.
Collaborating with sales teams to understand customer requirements and provide sales support.
Researching, developing, and identifying modifying products to meet customers' technical requirements and needs.
Soliciting and logging client feedback and evaluating the data to create new sales and marketing strategies to target customers.
Identifying areas for improvement and communicating these issues as well as possible solutions to upper management, including product managers.
Setting and achieving sales goals and quotas.
Training other members of the sales team on the technical aspects of the company's products and services.

We're not looking for someone who fits neatly into a box. We're looking for someone who finds neat boxes a little underwhelming.
You're a builder, not just an advisor - analysis without artifacts isn't enough.
You close loops. You ship things - You leave systems better than you found them.
You're customer-obsessed - you understand that what happens in enterprise POVs isn't a distraction from the real work. It is the real work. You run toward hard customer problems rather than away from them.
You're opinionated and direct - you push back when something is wrong, change your mind when shown better evidence, and write and speak clearly without filler.
You move without waiting to be told - when something is broken or missing, you identify it, own it, and fix it. You don't need a clean scope to start. You operate well under ambiguity and produce clarity for everyone around you.
You have a hacker mentality - you find the path through, you're comfortable in ambiguous and underdocumented systems, and you debug by instinct as much as by method.
You're technically deep and contextually wide - you can go deep on a data pipeline, a detection rule, a query engine, or a cloud architecture, then explain any of it to an executive the same afternoon.

CTO AI Lab Architect
About the Lab
We manage the software supply chain for 80% of the Fortune 100 - packages, container images, ML models, agent skills, MCP servers, and AI-generated code. The rules are changing fast, and we need someone who can build the next generation of tools to manage, govern, and secure it all.
Our CTO Lab is a small, senior team building what comes next. We sit across the entire platform - Artifactory, Xray, Curation, AppTrust, ML, AI Catalog, Fly, Runtime, Distribution - and our job is to figure out how AI changes all of it. We run focused experiments, prototype fast, demo often, and grow what works into products alongside our product and engineering groups.
This role has two modes. In Build mode, you'll work across the full breadth of the platform - from artifact management and security to ML lifecycle and developer experience. In Scout mode, you'll be our antenna - evaluating new AI frameworks as they drop, scanning for emerging patterns in agentic AI, supply chain attacks, and developer tooling, and feeding evidence into our strategic decisions.
As a CTO Lab Architect you will build:
AI-powered supply chain intelligence - LLM systems that reason over artifacts, dependencies, and release signals to move past static block/allow rules toward decisions a senior engineer would make.
Agent systems and governance - build and secure AI agents that operate against registries, pipelines, and deployment systems. Extend our controls to the AI artifact stack we ship today - MCP Registry, Agent Skills Registry, AI Catalog - and design the next generation of governance models.
AI woven across the platform - versioning, security, and provenance for AI artifacts, and capabilities that make developers faster wherever speed, trust, or judgment can be amplified.
Evaluation and measurement - benchmarks and pipelines that prove AI-powered approaches actually outperform traditional ones. Data beats opinions.
Technology scouting and signal analysis - evaluate new AI frameworks and security innovations as they emerge. Concise assessments of what's real, what's hype, and what it means for us.