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This is a highly visible role where you will own the physical design cycle at the partition, IP, and Chip levels-enabling us to produce fully functional "first silicon" designs. Do you love working on challenges that no one has solved yet? If you are ready to join the world's leading engineers and work with state-of-the-art design flows, come join our group.
Responsibilities
You will be responsible for all phases of pre-silicon development, from initial definition to high-quality tape-out (Netlist to GDSII).
Lead block-level Place & Route (PnR), complex floor-planning, partitioning, and the creation of power domains and grid specifications.
Develop and validate high-performance, low-power clock network guidelines and distribution.
Drive static timing closure (STA), Physical Verification (DRC/LVS), and Electrical/Power analysis (EM, IR-Drop, Xtalk, and Noise).
Participate in establishing CAD and physical design methodologies for "correct-by-construction" designs and assist in flow development for chip integration.
Generate and implement ECOs to fix timing, noise, and EM/IR violations while meeting strict area and power constraints.
Work closely with logic design teams on SoC architecture and HDL (Verilog) to implement timing fixes and design optimizations.

Required Staff Analog Design Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Staff Analog Design Engineer, you will design and integrate analog sub-systems. You will be responsible for ensuring the analog front-end (AFE) communicates with the digital signal processor (DSP), the package and silicon are a single electrical entity. Your work will bridge the analog and digital worlds to enable industry-leading performance.
The ML, Systems, & Cloud AI (MSCA) organization, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our services (Search, YouTube, etc.).
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Own the architecture and implementation of a major sub-component, such as the entire receiver AFE or the clocking/phase-locked loop (PLL) distribution network.
Design the critical suspension system (e.g., equalization/continuous-time linear equalizer (CTLE), analog-to-digital converter (ADC) that allows the digital core to function perfectly despite a noisy, high-loss channel.
Lead the definition and design of test chips to prove out novel topologies and circuit techniques in next-generation gate-all-around (GAA) nodes.
Work with DSP, firmware, and system architects to define hardware/software partitioning and interface specifications.
Provide technical guidance and mentorship to engineers on the team.

Nuvoton Israel is a leading supplier of SoCs, microcontrollers and security hardware solutions for tier-1 customers in the computing and server business. A self-contained design center, spanning from product management, system and chip architecture, through design, software development, system engineering and production. Our products combine unique sets control, management, and advanced security solutions, enabling our customers to establish differentiation in their end markets. We are looking for a Chip Design Verification engineer to join our Verification team! This is your opportunity to have an impact on the design of millions of computers sold worldwide each year by leading brands.
The role includes: - Building complex verification environments - Meeting the challenges presented by state-of-the-art design - Continues professional growth using the most advanced tools and methodologies - Use AI for improved productivity

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part in flows development.

At Lumissil, we are driving innovation in automotive technology, developing solutions that power the next generation of vehicles. We are looking for a Junior Engineer who is eager to learn, grow, and make an impact in a dynamic and innovative environment. This is a unique opportunity to work alongside experienced professionals, gain hands-on experience, and contribute to projects at the forefront of automotive electronics. If you are passionate about technology, curious to explore new challenges, and excited to make a real difference, Lumissil is the place to develop your skills, innovate, and grow your career. Why join us?
* Work on cutting-edge automotive projects
* Learn from a talented and supportive team
* Gain exposure to real-world automotive challenges
* Grow your career in a collaborative and inspiring environment If you’re ready to take the next step in your career and be part of something meaningful, we’d love to meet you! About The Position: As a Junior ASIC Design Engineer at Lumissil, you will take part in the full lifecycle of advanced chips that power the next generation of vehicles. This is a hands-on, growth-oriented role where you’ll work closely with experienced ASIC engineers, gain exposure to real silicon, and build a strong foundation in chip design and verification. In this role, you will:
* Be part of a professional ASIC team working on cutting-edge automotive solutions
* Support and learn from real emulation platforms used in production-grade designs
* Contribute to RTL implementation and gain practical experience in design flows
* Assist with verification and backend (BE) activities, learning industry best practices
* Participate in silicon bring-up, seeing your work come to life on real hardware This position is ideal for curious engineers who want to learn fast, take ownership, and grow into a key contributor in the world of automotive semiconductor design.

We are now looking for an outstanding, creative & hardworking Firmware PHY/Algorithms Engineer to join our team. You will be responsible for firmware development, characterization & validation of state-of-the-art network devices. Work as part of a team with circuit design, algorithm, architects & HW design to ensure outstanding product development from concept to customer satisfaction. The qualified candidate should be comfortable working on different code environments and should demonstrate a passion for the creation, execution, and improvement of FW features to control mixed-signal circuits.
What youll be doing:
Implement FW functionality in signal processing units of our products
Work closely with the architecture, HW, and SW design teams
Define implement and maintain FW algorithm to control the Silicon
Develop and test FW on emulation & simulation environments during the Pre-silicon phase
Debug and screen HW/FW/SW issues
Take an active part in silicon bring-up and SW development phases
Lead data-driven discussions about the product functionality and areas for improvement.

We are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.

Are you looking for a great opportunity to further your career? we are investing in the rapid growth area of Hardware Assisted Verification (HAV).
Our most successful multi-national customers are using our company HAV platforms to verify some of the worlds most advanced System on Chip (SoC) designs. HAV solutions are expanding to a wider audience of smaller companies who are benefiting from early software development and ultra-fast hardware verification through hosted services.
we are looking to hire a Senior Consultant with either Emulation or FPGA prototyping knowledge and experience. This role is ideally suited to someone with a good understanding of HAV platforms who can guide customers through successful HAV deployment and design validation. This is a great opportunity to work with some of the most interesting and innovative people and companies across the semiconductor industry.
The consultant role will be mainly focused on technical services delivery. This could range from platform enablement to methodology guidance. Interactions may be direct with the customer or collaborative through a wider technical team. This position will require a combination of remote, office and onsite working. As a consultant, you will also be expected to uncover opportunities, scope engagements, promote offerings, and grow new business.
Key Responsibilities
A good understanding of HAV platforms and infrastructure (e.g. Strato, Primo or proFPGA enterprise-level systems would be preferable)
A good understanding of HAV compilation and runtime flows (e.g. Veloce or VPS would be preferable)
Practical insights into the application and usage of HAV
Knowledge of design mapping, testbench mapping and pre-silicon validation
Familiarity with HAV debug solutions (probes, waveforms, assertions, coverage, etc.)
Knowledge of virtual TestBench eXpress (TBX) and/or In-Circuit Emulation (ICE) use-cases
Proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification
Strong background in functional verification, RTL synthesis, design partitioning and place-and-route
Conversant with SoC design and architecture concepts.

Required Accelerator - Application Engineer
Description
A leading high-tech company, developing top-performing AI processors for edge devices in various industries. We combine an extensive understanding of the way neural networks operate, with our teams expertise in SW and HW architecture, to develop products that transform the way we use machines to perceive and analyze the world around us.
Our company is led by a group of experts from a wide range of disciplines, combining experience from elite intelligence units as well as leading tech companies in Israel and abroad, with a track record of executing complex projects from the ground up. As an AI chip company, we believe that AI can help us create a better, safer, more productive, and more convenient world. For this to happen, AI needs to be available at scale and on the edge.
To this end, our team of hardware and software leaders is developing top-performing AI processors, dedicated to AI tasks on edge devices in a wide variety of applications and industries including smart cities, automotive, manufacturing, agriculture, retail, and many more. With hundreds of customer programs around the world, and a wide ecosystem of software and hardware partners, we are leading the edge AI revolution.
In this position
In this role, you would work very closely with both customers and internal teams. On the technical side, you would build demos and reference applications in C++, Python, and GStreamer, helping showcase and enable different AI use cases, including vision AI and generative AI.
You would also support customers as they evaluate and deploy our technology, helping them optimize models, integrate with our accelerator stack, and troubleshoot issues. Internally, the role acts as a bridge between customers, R&D, product, and business teams to make sure technical requirements and feedback are clearly communicated.
Responsibilities
Design and develop end-to-end demo and reference applications in C++, Python, and GStreamer for Vision AI and GenAI use cases.
Own deep technical expertise across the accelerator stack, including Dataflow Compiler, runtime, model quantization, performance optimization, and roadmap direction.
Support deployment and optimization of deep learning models, including transformer-based and generative models.
Lead technical alignment processes with customers from evaluation through deployment.
Act as primary technical focal point for selected strategic accounts.
Provide structured and high-quality pre-sales and post-sales technical support.
Drive issue resolution across Customer Success and R&D, ensuring clear ownership and follow-up.
Translate business needs into technical requirements and collaborate with Product to influence roadmap decisions.
Ensure excellent response time and support quality for customer escalations.
Define best practices, documentation, and internal workflows for application engineering.

We seek a forward-thinking, innovative, and experienced Solutions Architect with hands-on experience.
By joining the team, youll take a part in the design and implementation of complex data center solutions, including solution architecture, HW and SW deployment, performance, and return on investment analysis. You will work with software developers and architects to research and analyze new, groundbreaking technologies.
The candidate is expected to have hands-on experience with data center technologies, including operating systems, virtualization and containerization technologies, storage, networking, and infrastructure as code (IaC) tools such as Ansible. A candidate for this position must excel at working independently as well as in a group, in a multidisciplinary, dynamic environment.
What youll be doing:
Implement cutting-edge, end-to-end data center solutions with modern applications.
Architect, develop, deploy, automate, analyze, formalize findings, and release summary reports.
Develop and release reference deployment guides and how-to tutorials.
Support company business units on complex solutions delivery by consulting, providing solutions designs, running POCs, etc.
Research technology trends and deliver best practices for integrating our products and technologies.

Required Cloud Architect
Tel Aviv, Israel
About us:
We are international Multi-Cloud experts, utilizing the power of the cloud for smart digital transformation. With 5 sites over 4 continents around the globe, +450 experts, +1000 customers, and +30 years of proven experience, our mission is to deliver the best Multi-Cloud service to our customers, accelerate their business and help them grow. As tech-savvies, To help our customers stay on top of their game, our teams are constantly developing new strategies and tools that will help them improve cloud performance, spending, visibility, control, and automation. Our cloud experts will make any digital transformation a quick, smart, and easy process
What You'll Do:
Realization and implementation of the architecture on the variety of technological components and services
Implementation of automations and scripts based on Infrastructure As A Code (for example: Terraform)
Implementation and implementation of protection and security solutions in the cloud
Maintaining regular interfaces with the security and cloud protection teams in the organization
Locating and implementing new technological opportunities in the cloud field
Maintaining regular interfaces with companies and organizations in the cloud field in Israel and in the community.

We are seeking an experienced technical leader to head our collective communication library development team. This role involves leading a team of engineers in developing high-performance collective communication implementations for multi-NPU and multi-node AI workloads.
Key Responsibilities
Lead the design and development of collective communication primitives (All-Reduce, All-to-All, Gather/Scatter and etc)
Architect scalable communication protocols for multi-NPU and multi-node systems
Optimize communication performance for NPU architectures
Provide technical leadership to the team members in NPU programming, distributed systems, and communication protocols
Work with a success-driven worldwide international team (Network, NPU, QA, AI, DL/ML Framework)
Define project milestones, deliverables, and technical roadmaps
Ensure compatibility with major AI frameworks (PyTorch, TensorFlow, JAX).

Cortex is expanding. We combine the high energy of a startup with the massive resources of the worlds cybersecurity leader. We aren't just processing data; we are managing hundreds of petabytes of it, waiting Cortex for you to apply your "magic" to invent the next generation of threat detection. As a Principal Software Development Engineer, you will be a cornerstone of the Cortex Detection Backend team. This role is designed for a technical powerhouse who thrives in the "sweet spot" between high-level architectural strategy and hands-on execution. You will influence our product roadmap, mentor elite engineers, and build systems that protect thousands of the world's most sensitive organizations.
Key Responsibilities
Architect & Innovate: Design and build a new set of capabilities focused on Data Analytics and Threat Detection. You will solve cloud security challenges that have never been tackled before.
Scale Without Limits: Ensure our microservices architecture remains robust and resilient under massive loads, processing millions of events per second.
Technical Leadership: Act as a technical sounding board and mentor. You will guide design discussions, conduct deep-dive research, and foster a culture of engineering excellence.
Strategic Collaboration: Work closely with Product Management, R&D leaders, and Security Researchers to define requirements and turn ambiguous problems into elegant technical solutions.
Drive Execution: Take ownership of the software development life cycle, ensuring high-velocity delivery in a fast-paced Agile environment.

Your Career:
As a Principal Software Engineer, you will be a technical trailblazer responsible for the architecture and evolution of our automation ecosystems. This role requires a visionary who can bridge the gap between emerging LLM research and production-grade reliability. You will define the technical foundations that enable autonomous security workflows, ensuring our platform is forward-compatible with the rapidly evolving Agentic AI landscape.
Your Impact
Architectural Leadership: Define and own the technical vision for the Cortex Platforms automation foundations and Agentic AI integrations.
System Design for Autonomy: Architect highly resilient and non-deterministic systems, designing abstract frameworks that optimize security workflows for autonomous planning and execution.
Advanced Problem Solving: Define the right technical approach for emerging challenges where no proven solution yet exists, specifically addressing LLM limitations like latency, hallucinations, and determinism.
Scalable Engineering Standards: Define global technical standards for the platforms automation ecosystem, merging advanced CI/CD governance with robust telemetry and metrics to track execution health across thousands of production tenants.
Technical Alignment: Align diverse engineering stakeholders around a single, cohesive technical direction for platform-wide automation and integration features.
Strategic Reliability: Drive step-function improvements in system reliability and quality, establishing a technical roadmap that anticipates the next generation of Agentic Response.