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we are looking for an experienced dft engineer to join an exceptional team of dft experts to develop the next generation dft technologies.
as a dft engineer at the networking group at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

Power the Future with us! We're a global leader in smart energy technology, with over 3,000 employees, offices in 30 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. We offer amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. We are seeking a highly skilled and experienced Automated TEST Equipment Engineer to join our dynamic team. You will be responsible for the design, development, and implementation of automated TEST systems for our cutting-edge products. This role requires a strong background in hardware engineering, as well as experience in TEST automation and system integration. Responsibilities:
* Design and develop hardware solutions for automated TEST systems, including TEST fixtures, load boards, and interface circuits.
* Perform hardware debugging, troubleshooting, mass production support and optimization to ensure reliable and efficient TEST systems.
* Develop and maintain hardware documentation, including schematics, layouts, and mechanical designs.
* Design and develop software for TEST automation, including TEST sequencing, data acquisition, and result analysis.
* Collaborate with cross-functional teams, including hardware, software, engineering, quality, and manufacturing.
* Stay up to date with the latest trends and technologies in automated testing procedures.
Country:
Israel
City:
Herzliya

We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance. Our team operates in a hybrid model, with three days a week in the office in Midtown Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation.

Your Impact

As an Experienced DFT Engineer, you will:

Own and drive DFT execution across the full product lifecycle, from pre-silicon design through post-silicon debug and production qualification.

Define and align DFT architecture and strategy in close collaboration with chip architects, design, and verification teams.

Oversee and contribute hands-on to the implementation of DFT features, including ATPG, scan insertion and compression, and memory BIST.

Lead silicon debug activities and root-cause analysis, driving corrective actions to improve yield, reliability, and test quality.

Establish, standardize, and evolve DFT methodologies and best practices across projects.

We are looking for a senior hardware engineer to join our av platform hw development group in israel to design the next generation of autonomous driving systems. what will your job look like?
responsible for specifying the hardware for our autonomous driving systems
lead the hw design process: product specification, electrical schematics, component selection, layout, hands-on testing in a lab environment, verification, accompanying production and qualification processes
define signal integrity simulations (lpddr4, mipi, fpd-link, etc.), perform power integrity (dc drop, pdn ac analysis) and analog simulations (like spice).
manage the technical interface with our customers to derive the product hardware requirements
work in collaboration with all the project disciplines: system architecture, mechanical and thermal, software (networking and algorithms), safety and reliability.

We are looking for a senior hardware engineer to join our av platform hw development group in israel to design the next generation of autonomous driving systems. what will your job look like?
responsible for specifying the hardware for our autonomous driving systems
lead the hw design process: product specification, electrical schematics, component selection, layout, hands-on testing in a lab environment, verification, accompanying production and qualification processes
define signal integrity simulations (lpddr4, mipi, fpd-link, etc.), perform power integrity (dc drop, pdn ac analysis) and analog simulations (like spice).
manage the technical interface with our customers to derive the product hardware requirements
work in collaboration with all the project disciplines: system architecture, mechanical and thermal, software (networking and algorithms), safety and reliability.

our networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, optical transceivers, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of sectors including high performance computing, enterprise, data centers, cloud computing. we are constantly reinventing ourselves to stay ahead of the market and bring ground-breaking products and services to the industry by using novel technologies. our products are focused on delivering the most optimized power - performance communication solutions for industries like ai, ml, cloud, media and entertainment.
 
we are now looking electrical engineers who like to see the big picture of high-end optical transceiver design. this role will give you a rare opportunity to craft and deliver a new class of products, aimed at delivering data at incredible speeds, using high end solutions to lead the world of high-speed optical communication to new extremes.
 
what you'll be doing:
detailed design of the electrical schematics in the product, board design and components selection.
leading the product multi-discipline design in all fields including work with thermo-mechanical, signal/power integrity, software, and optics teams and more.
hands on lab work to bring to design to life, evaluate and improve the product performances.
work with multiple operational groups inside and outside the company such as qualification, suppliers, and manufacturers to scale the product from lab to mass production high runner.
learning to use new technologies to enable improvement for generation to generation.

we are looking for a VLSI Design Engineer.

We are looking for an experienced STA Lead Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.

Senior Board Design Engineer Own the hardware. Drive the innovation. Shape the system. We are looking for a Senior Board Design Engineer to take a leading role in designing and developing complex electronic boards for advanced defense systems. This is a high-impact, hands-on technical leadership role within a hardware team-ideal for someone who thrives on ownership, influences architecture decisions, and enjoys working across multidisciplinary environments. What Youll Do
- Lead end-to-end board design - from concept to production
- Own hardware architecture and drive key technical decisions
- Deliver across the full lifecycle: schematics, layout guidance, bring-up, validation & production
- Act as a technical focal point across hardware and cross-functional teams
- Collaborate closely with software, mechanical, and system engineers
- Work with suppliers, subcontractors, and manufacturing partners
- Perform deep debugging, analysis, and root-cause investigations
- Take part in design reviews, EMC testing, system validation & field trials
- Support manufacturing transition, including documentation and yield improvement

As a Wireless Design Verification Engineer, you will be part of a team that is responsible for pre-silicon RTL verification of communication subsystems, SoC sub-systems and chip-level functionality. The activity may focus on block level, sub-system level or chip level, including end-to-end simulations of the entire data/control path. You will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification.
Description
- Own critical block and sub-system verification of wireless SoC projects
- Architect and develop testbenches and environments, by using state-of-the-art verification methodologies
- Define verification plan, create, simulate and debug test scenarios
- Drive regression and coverage analysis to ensure high quality DV
- Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute

looking for an experienced electronics/ system Engineer to serve as a technical project leader (tpl), join our organization, and be a part of the system product engineering organization. the team delivers brand new, high-quality products to nvidia's customers, applying the following: development and deployment of automatic testers for nvidias network business units (computing network adapters and high-speed switch systems) including hardware, software, and mechanics; coordinating and leading all aspects of the analysis of manufacturing data to identify and mitigate quality issues using advanced data analysis techniques such as Machine Learning, statistical tools, and ai; leading smooth production and capacity enlargement and failure analysis of return material from customers to understand the reason for failures ;validating TEST performance and stability using QA (v&v - validation and verification) methods; the tpl leads projects from requirement until end of life; engineering manager for spe projects and technical authority across spe teams
what youll be doing:
building integration plans, communicating status and priority among the teams (in/outside of spe), assessing risks and developing mitigation plans
leading the project lifecycle in the spe group, which starts at the requirements stage, through chip design and fw stages till spe mp, including quality and yields improvement plans
responsible for bugs management prioritization and tracking and relevant knowledge transfer to the spe group
working closely with development teams for environment improvements, such as automation, and driving mitigations to reduce risks
collaborating with pm for schedule tracking and modifications
evaluating new technologies and testing capabilities for improvement
working with the testing architecture team (dft) to assure testing setups and coverage are met
engaging with a variety of teams: r&d, hw and sw, chip design, operations, thermal, signal integrity, fw and sw, layout, and more, report project status for high level management

Required Accelerator - Application Engineer
Description
A leading high-tech company, developing top-performing AI processors for edge devices in various industries. We combine an extensive understanding of the way neural networks operate, with our teams expertise in SW and HW architecture, to develop products that transform the way we use machines to perceive and analyze the world around us.
Our company is led by a group of experts from a wide range of disciplines, combining experience from elite intelligence units as well as leading tech companies in Israel and abroad, with a track record of executing complex projects from the ground up. As an AI chip company, we believe that AI can help us create a better, safer, more productive, and more convenient world. For this to happen, AI needs to be available at scale and on the edge.
To this end, our team of hardware and software leaders is developing top-performing AI processors, dedicated to AI tasks on edge devices in a wide variety of applications and industries including smart cities, automotive, manufacturing, agriculture, retail, and many more. With hundreds of customer programs around the world, and a wide ecosystem of software and hardware partners, we are leading the edge AI revolution.
In this position
In this role, you would work very closely with both customers and internal teams. On the technical side, you would build demos and reference applications in C++, Python, and GStreamer, helping showcase and enable different AI use cases, including vision AI and generative AI.
You would also support customers as they evaluate and deploy our technology, helping them optimize models, integrate with our accelerator stack, and troubleshoot issues. Internally, the role acts as a bridge between customers, R&D, product, and business teams to make sure technical requirements and feedback are clearly communicated.
Responsibilities
Design and develop end-to-end demo and reference applications in C++, Python, and GStreamer for Vision AI and GenAI use cases.
Own deep technical expertise across the accelerator stack, including Dataflow Compiler, runtime, model quantization, performance optimization, and roadmap direction.
Support deployment and optimization of deep learning models, including transformer-based and generative models.
Lead technical alignment processes with customers from evaluation through deployment.
Act as primary technical focal point for selected strategic accounts.
Provide structured and high-quality pre-sales and post-sales technical support.
Drive issue resolution across Customer Success and R&D, ensuring clear ownership and follow-up.
Translate business needs into technical requirements and collaborate with Product to influence roadmap decisions.
Ensure excellent response time and support quality for customer escalations.
Define best practices, documentation, and internal workflows for application engineering.

We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:

Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.

we are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities
Lead next generation inference solution optimized for power, performance and area. Considering scalable solution for large scale systems with many resources. Covering efficient data delivery and workload map.