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We are looking for a motivated and experienced Full-Stack Engineer with 3+ years of hands-on experience to join one of our teams. As a Full-Stack Engineer , you will take ownership of features across the entire development lifecycle - from initial concept and design to deployment and maintenance in an enterprise-grade production environment. This role involves close collaboration with the product team to turn ideas into high-quality, functional software.

Responsibilities:

Develop and lead the end-to-end implementation of new features and product offerings
Design, build, and maintain efficient, reusable, and reliable code across the full stack
Collaborate with UI/UX designers, product managers, and engineers
Participate in all phases of the development lifecycle, including analysis, design, coding, testing, and deployment
Ensure application performance, quality, and responsiveness

As a Research Engineer, you will design, develop, and implement algorithms and models that will enhance the products capabilities, performance, reliability, and scalability. Together with our algo and engineering team members, you will work closely with our product team members to implement algorithms that can be used to drive our business forward as well as the frontier of software development AI technologies.

Responsibilities:

Design, develop, implement and test algorithms and AI-empowered solutions for various product features and applications
Collaborate with cross-functional teams to understand business needs and translate them into algorithmic solutions
Perform research on emerging trends, algorithms, and cutting-edge technologies, and identify ways to incorporate them into our products pragmatically
Propose new and innovative solutions to complex problems and lead the development of algorithms in those areas
Design, cleanse, and utilize benchmarks throughout the process of the algorithm development

Were seeking an exceptional Senior Backend Engineer to join our Platform team. This team is at the heart of what we do- building the tools and infrastructure that enable to scale rapidly while maintaining the quality and reliability our users depend on.

Responsibilities

End-to-End Ownership: Lead projects from design through production, taking responsibility for technical decisions and their outcomes
Platform Architecture: Design and evolve scalable backend systems that power our core products
Infrastructure & Reliability: Build robust, high-performance APIs and services that handle production workloads at scale
Developer Experience: Create internal tools and frameworks that accelerate development across the organization
Technical Leadership: Drive architectural discussions, mentor team members, and raise the bar for engineering quality

We are seeking a skilled Salesforce Solution Architect to join our team. As a Salesforce Solution Architect, you will design and implement Salesforce solutions for our clients. You will collaborate with various stakeholders to understand business requirements and translate them into scalable and efficient Salesforce solutions. The ideal candidate will have a solid technical background in Salesforce, with demonstrated expertise in architecture design and implementation. We want to hear from you if you are passionate about Salesforce and enjoy working in a dynamic and challenging environment.

Responsibilities:
Designed and implemented Salesforce solutions for clients, ensuring scalability, efficiency, and best practices.
Collaborate with stakeholders to understand business requirements and translate them into technical solutions.
Lead and participate in project planning and estimation activities.
Provide guidance and mentorship to development teams on Salesforce best practices and design patterns.
Collaborate with cross-functional teams to integrate Salesforce solutions with other systems.
Identify and resolve technical issues and challenges, driving continuous improvement and optimizing Salesforce solutions.
Stay up-to-date with Salesforce platform updates, new features, and industry trends to provide innovative and effective solutions that is used for creating requisitions 'from scratch'.

Were looking for an AI Product Manager to join our product team and help shape the next generation of AI developer tools. This is a high-impact role for someone who thrives at the intersection of technical depth, user empathy, and product thinking. This role is ideal for someone who has worked on technical or developer-facing products, is deeply customer-oriented, and is comfortable rolling up their sleeves when needed.

Own the product lifecycle for one or more product areas - from ideation and requirements through delivery and go-to-market enablement
Spend significant time with customers: conducting discovery interviews, understanding pain points firsthand, and translating insights into product decisions
Work closely with R&D teams on a daily basis - participating in technical discussions, helping shape architecture trade-offs, and ensuring the team has clear, well-defined requirements
Enable the sales and customer success teams with the knowledge, materials, and positioning they need to land deals and drive adoption
Define and validate product opportunities through customer research, data analysis, and competitive intelligence
Translate complex technical concepts into clear product requirements and crisp user stories
Drive cross-functional alignment across engineering, design, sales, and customer success to ensure launches land well
Establish and track success metrics, running experiments and iterating based on evidence
Be the voice of the developer - obsessively understanding how developers work, what they struggle with, and where AI can genuinely help

We are seeking a Solutions Engineer to become an integral part of its team, dedicated to offering technical guidance and assistance. The ideal candidate will have the chance to cultivate connections with pivotal clients and play a crucial role in advancing the sales of our products. If you aspire to collaborate closely with our sales, product and R&D team, delivering technical expertise, demonstrations, and solutions to our customers, we would love to hear from you!

What will you do?

Providing technical guidance and support to prospects and customers
Explaining products and services to customers and work closely with them to understand their technical requirements and translate them into effective solutions.
Assisting with product demonstrations, presentations and webinars.
Provide training to clients, both in person and remotely, to ensure they can effectively use our products.
Respond to technical inquiries and provide in-depth information to clients.
Support the closing of deals by addressing technical concerns and objections.
Gather feedback from clients and the sales team to help improve our products and services.

We are looking for a Salesforce Busines Analyst to join our growing Professional Services Team and to play a key role in designing solutions and translating complex business needs int efficient processes and technical plans. You will lead projects from scratch, manage all project documentation, and work closely with clients to resolve complex issues in a fast-paced environment.

Summary of Key Responsibilities
Understand customers needs, current workflows, and design implementation plan to address those needs.
Configure Salesforce platform in client environment as per Statement of Work and implementation plan.
Communicate the client's needs for the new implementation.
Work with client Success teams to successfully transition the account from the implementation period to the launch, training, post-launch, and adoption period.
Lead, define, and prioritize business functional requirements.
Set and manage deadlines with clients and internal team: assign responsibilities, monitor the progress of projects, create weekly client status.

The SDR will generate leads, research accounts, and set and qualify appointments for our sales team. You will be the potential customers' first point of contact and play a critical role in the success of our sales efforts. In close collaboration with the sales and marketing teams, you will develop strategies and messaging to drive new business.

As a Sales Development Representative (SDR), you will help businesses advance their cloud journey and digital transformation.

We are looking for a highly proactive, ambitious, and results-oriented Sales Development Representative (SDR) who is eager to learn and possesses a strong sense of curiosity. As an SDR, you will be part of the Israeli marketing team and work closely with other cross-functional teams.

Responsibilities:
Conduct cold and hot calls and email sequences to generate new sales opportunities.
Understand our Ideal Customer Profile (ICP) and conduct company and industry research.
In coordination with the marketing team, develop nurturing strategies that include outbound calling, emailing, events, etc., to convert leads into sales opportunities.
Schedule meetings with potential customers for our sales representatives in alignment with the sales team.
Present AWS / Salesforce and our products and participate in demo/pitch sessions with C-level and VP-level executives of potential new customers.
Create leads, opportunities, and reports in Salesforce in collaboration with the AWS / Salesforce team.
Collaborate with the Account Executive team on account strategy, messaging, and qualification criteria, and participate in the early stages of the deal cycle.

we're seeking a visionary Design Verification Student to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, designing complex solutions that sit at the heart of our most ambitious connectivity projects.

As a Design Verification Student, you will be at the forefront of quality, learning how to ensure that the chips powering the world's largest AI clusters are bug-free and robust.
This isn't just about running tests - its an opportunity to learn advanced verification methodologies (UVM/SystemVerilog) alongside world-class engineers. You will support the development of sophisticated testbenches and help verify high-performance digital blocks that sit at the heart of AI infrastructure.



Key Responsibilities


Assist in building and maintaining System Verilog/UVM-based testbenches, including monitors, checkers, and functional coverage models
Run simulations, analyze failures, and work with the design team to debug and resolve RTL issues
Help define and implement functional coverage and assertions to ensure all "corner cases" of the design are tested
Utilize and improve scripting (Python/Tcl) to streamline verification flows and result reporting
Partner with Design Engineers to understand block specifications and ensure the verification plan matches the design intent

we're seeking a visionary Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters.

As a Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow-you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Physical Implementation & Execution

Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards
Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS)
Own macro-level implementation with deep hands-on experience in floorplanning and complex routing
Signoff & Design Integrity

Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Ensure first-pass silicon success through rigorous signoff flows and analysis
Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness
Methodology Development & Cross-Functional Collaboration

Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation
Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity
Leverage scripting and automation to make engineering environment faster and more robust

we're seeking a visionary Senior DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Senior DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy

Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards
Define DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies
Test Pattern Development & Optimization

Generate and optimize high-quality test and debug patterns for production
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance
Drive test coverage and quality metrics to meet stringent manufacturing requirements
Cross-Functional Collaboration & Methodology Innovation

Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR
Participate in developing and maintaining cutting-edge DFT implementation flows
Automate and improve methodologies using advanced scripting and tools

we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation

Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market
System-Level Debug & Validation

Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently
Cross-Functional Collaboration

Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies

we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up.
If you thrive on solving complex, unnamed challenges in deep-submicron processes, your place is with us.

As a Physical Design Engineer, you will be a key hands-on member of our PD Team in the Israel R&D center. You will execute the physical design of the SoC Top level for chips that drive the worlds largest AI clusters. You will be deeply involved in all PD disciplines of the chip, driving the tape-out (T.O.) GDS to meet strict signoff criteria (Timing, LVS, EMIR, DRC, PV, etc.), ensuring our silicon meets the extreme performance, power, and area (PPA) targets required for AI scale.

Key Responsibilities


Execute SoC Top-level physical design and actively drive full-chip convergence
Perform Top-Level physical implementation, including floor-planning, Place & Route (P&R), Clock Tree Synthesis (CTS), Power/Clock distribution, Power Integrity, and Timing/Physical signoff
Work closely with the Architecture, Design, DFT, and Product teams to achieve optimal Power, Performance, and Area (PPA). This involves participating in feasibility studies for new architectures and optimizing runs to ensure the best Quality of Results (QoR)
Resolve complex signal integrity, thermal, and power challenges inherent in high-speed connectivity silicon
Collaborate closely with the Package team on Bump-map-to-Ballout design, taking all signal integrity aspects into consideration

we're seeking a highly skilled Physical Design CAD Engineer specializing in CAD Automation and Signoff to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, implementing the backend execution environment and methodologies for chips that power the world's largest AI clusters. As a foundational member of the team, you will be responsible for the physical implementation environment. Your primary mission is to develop, optimize, and support automated flows from RTL to manufacturable GDSII tape-out, ensuring a methodical and efficient work environment for the entire PD team.


Key Responsibilities


Develop and maintain automated flows for Synthesis, Place & Route (P&R), and Floor-planning to ensure seamless design transitions
Implement and manage robust environments for Static Timing Analysis (STA), Power Analysis, and Physical Verification (DRC/LVS/ERC)
Write and maintain custom plug-ins and scripts (Tcl/Python) to extend vendor tool capabilities, tailoring them to specific process node constraints
Build automated "dashboards" and feedback loops to track and improve Power, Performance, and Area (PPA) metrics across design iterations
Own the design database structure and version control to ensure team alignment and data integrity
Collaborate directly with EDA vendors (Synopsys, Cadence, Siemens/Mentor) to troubleshoot flow issues and analyze tool results
Provide technical support to the broader PD team, helping them optimize individual blocks for power, performance, and timing

we're seeking a highly skilled Static Timing Analysis (STA) Engineer to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the sign-off methodology for chips that power the world's most advanced AI clusters. As an STA Engineer, you will be deeply involved in the STA activities from chip partition and time budgeting through to final sign-off. You will bridge the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities


Execute the STA flow and sign-off methodologies, ensuring our products meet rigorous timing criteria for the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams, participating in timing reviews and working with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints, ensuring they are accurate and robust across multi-scenario environments
Analyze and resolve challenges related to cross-chip clock distribution networks and apply sophisticated margining techniques to ensure robust silicon across all process corners
Participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and custom scripts to make our sign-off process faster and more efficient