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Required Senior Software Engineer, Cloud Filestore, Copy Services
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
Filestore provides a fully managed NFS service for Enterprise Cloud users who need a traditional file system that is hosted in GCP. We are transforming our services into an active, intelligent substrate for Agents that can support 10s of millions of Agents, with high-performing, persistent, secure, and shareable storage.
The Copy Services Team owns Filestore's Backup and Disaster Recovery mechanisms, backing up 1.5 Petabytes and replicating 250TiB daily for thousands of Filestore customers.
Our mission is to deliver an enterprise grade, high performance, highly reliable filesystem as a service for GCP customers, build the most advanced and feature-full cloud filesystem in the world, and build a system capable to grow according to customer demand and usage in terms of capacity and performance.
Responsibilities
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Define, design and implement the next set of key features of the Cloud Filestore backup services.
Work closely with peers from Filesystem engineering, product, project management, and SRE teams.
Improve the existing backups and disaster recovery functionality and infrastructures.
Help define, design and implement the next generation of the filesystem's backups service.

we are looking for a Staff Software Engineer
Your Role:

Solve some of the teams toughest technical problems and build solutions that hold up as the product grows.
Partner with product managers, architects, and other engineers on technical approach and planning, contributing perspectives that can extend beyond your immediate area when its useful.
Act as a go-to technical resource for complex design and architecture questions, helping ensure solutions hold up against business needs, compliance standards, and long-term maintainability.
Take ownership of the most complex technical issues that come up in your systems, driving root cause analysis and fixes that hold up over time.
Mentor other engineers through code review, design discussions, and everyday guidance, helping raise the technical bar around you.
Bring a high bar to your own code and design work, and help others do the same through thoughtful review and knowledge sharing.

Requied Full Chip CAD Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Demonstrate an understanding of the Register-Transfer Level (RTL) to Graphic Data Stream (GDS) II flow.
Manage the implementation of large, complex system-on-chips (SoCs), subsystems, and sub-wrappers, and demonstrate an understanding of associated issues and solutions.
Utilize floorplanning, power grid design, and place-and-route methodologies, and use Synopsys tools like Floorplan Compiler (FC) and Formality.
Exhibit an understanding of advanced node design (e.g., 5nm and below) and related optimization techniques.
Develop script in Synopsys TCL and Python.

Required Senior SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, we are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Architect and implement reusable formal verification components.

Required Senior Silicon DFT Lead
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

Required CPU Design for Test Engineer, Cloud
About the job
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.
Responsibilities:
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

Required Senior Silicon Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

Required Research Data Scientist II, Waze
About the job
The Personalized Experience team aims to give Waze drivers personalized, hyper-local, contextual and timely routing experience. The team contributes to the Personalized Navigation squad and more. The team members are embedded within the Waze development Squads. We develop and own Machine-Learning models from ideation to production, including research, production grade pipelines, feature engineering, experimentation, monitoring and dashboards, inspection and debugging.
The team works closely with the product team, helping to shape the requirements and success metrics. The team works closely with the Backend teams, integrating the models, ensuring a feedback loop to enrich the models, triage and solve users complaints, leading and guiding experimentation and more.
Waze is where people and technology meet to solve transportation challenges. It's a platform that empowers users to contribute road data and edit Waze maps to improve the way we move about the world. As the social navigation pioneer, Waze leverages mobile technology and a passionate global community to redefine expectations of todays maps.
Responsibilities
Feature engineering, model evaluation and error analysis, data processing and pipelines, model tuning, monitoring and dashboards.
Work with product managers, software developers and quality analysts to define requirements, formulate success metrics and lead experimentation.
Use data to help products to shape the future of Waze and drive innovation. Provide insights on user behavior and help engineers and quality analysts detect and solve complex problems.
Utilize Cloud Platform, Vertex AI, Python, Scikit-learn, TensorFlow, Airflow/Composer, Python and Looker tools.

We are looking for an Analytics Engineer (contract) to join Artifactory Product Analytics and build the data platform behind how we measure our products. You will own the engineering side of analytics: designing product telemetry with PMs and R&D, modeling that data into trusted, reusable datasets in the warehouse, and making those datasets easy for analysts and stakeholders to consume. Product analysts own the product questions and metric definitions; you make the data underneath them fast, consistent, and dependable.
You will work inside an AI-native analytics environment (Cursor, Claude, and similar coding agents) as the default way of shipping - not as an optional add-on.
Fixed-term contract: 6-8 months. Start date: October 12, 2026.
Responsibilities:
Design telemetry: partner with PMs and R&D to define event and data specs for product usage - schemas, properties, validation, and the path into the warehouse (core, ongoing part of the role)
Build the modeled layer: develop and maintain dbt transformation models (staging → intermediate → gold) so Artifactory product data is consistent, tested, documented, and reusable
Enable self-serve: with the analysts, design and implement how stakeholders reach certified product data so recurring questions don't need a custom pull
Align definitions: standardize entities, grain, and model structure across Artifactory areas together with the analysts who own product meaning
Ship in an AI-native workflow: specs, SQL, dbt models, reviews, and documentation done in Cursor / Claude and equivalent tools.

We are looking for a hands-on Backend Engineer to join an innovative R&D team building a cloud-native product. You will deliver high-quality Go (and Java where needed) using modern cloud frameworks, and own features end-to-end - from design through production health.
Responsibilities:
Design, implement, and ship backend services for a cloud-native product - from design through production
Write clean, testable, maintainable Go (and Java where needed)
Own features end-to-end with your team: APIs, data model, tests, rollout, and production health
Partner with product and peers on design trade-offs for scalability and reliability
Proactively propose and drive incremental product improvements, not just ticket work
Keep pace with DevOps and cloud-native practices that affect how we build and run software.

The company is a leading direct-to-consumer platform for app publishers, processing more than $1B annually. As a Senior Backend Engineer you will build and evolve core backend systems - high-scale, cloud-native services that power critical business flows - with end-to-end ownership from design and architecture to production, monitoring, and continuous improvement.
Responsibilities:
Design and maintain scalable, high-availability backend services in cloud-native environments.
Own features end-to-end: design, implementation, deployment, monitoring, and optimization.
Contribute to system architecture, API design, data modeling, and event-driven flows.
Write maintainable code and participate in design/code reviews.
Optimize performance, reliability, and resource usage.
Collaborate with Product on translating business requirements into technical solutions.
Mentor other engineers and improve engineering standards.

This role sits at the intersection of AI and high-performance systems engineering, focused on solving real-world problems under strict constraints. You will work on systems where performance and reliability are critical and where improvements have a direct, measurable impact on real-world safety.

This is a senior, systems-focused role with end-to-end ownership over performance and reliability of production computer vision pipelines. You will define optimization strategies, identify bottlenecks across the system, and drive improvements under real-world constraints.

What youll do
Build and optimize real-time computer vision pipelines running on edge systems processing live maritime video streams (e.g, NVIDIA Jetson, Triton Inference Server).
Take models from research and turn them into production-ready, reliable components deployed on vessels.
Profile and improve end-to-end system performance across: multi-camera video ingestion; preprocessing; inference; postprocessing.
Identify and resolve bottlenecks across CPU, GPU, memory, and pipeline coordination.
Make and justify tradeoffs between latency, accuracy, stability, and resource utilization.
Design and implement robust data and inference pipelines (video -> model -> actionable output for crew).
Develop benchmarking and evaluation workflows to measure performance end-to-end and support release gating.
Build and improve observability tools, including logging, monitoring, and debugging workflows for production systems.
Define and maintain clear interfaces between research code and production systems.
Work closely with research and backend teams to integrate new models into production systems.
Continuously improve system efficiency and reliability under hardware and runtime constraints.

Required RTL Design Technical Lead, Servers, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use the ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the Design Activities at IPs, SubSystems(S.S) and SoC.
Plan, execute, track progress, assure quality, report status of the assigned activity.
Lead a team of designers both directly and in teams.
Define the Block/SoC level design documents such as Micro Architectural Specifications.
Own IP, S, SoC strategies for clocks, resets, and debugs. Enforce global methodologies and drive enhancements.

We are hiring a Senior Robotics Software Engineer to build the system the autonomy runs inside. You own the runtime - ROS2 architecture, module lifecycle, orchestration, state management, configuration, fault handling, and both ends of the stack: World Model ingestion and the Vehicle Interface down to the platform control systems.

You will face hard real-time constraints, embedded compute, and a system that has to keep behaving correctly when parts of it do not. You own the stack across its full depth, from the interfaces at its edges to how the whole thing behaves in the water.

What Will You Do?
Own the autonomy runtime: ROS2 and modern C++ architecture, module lifecycle, orchestration, state management, data flow, configuration, fault handling and recovery
Implement the system's two contracts: World Model ingestion and Vehicle Interface adapters to the platform control systems
Own deployment to the vessel compute: builds, packaging, versioning, configuration management and CI
Work with system engineering and field teams on vessel bring-up, sea trials and debugging in the field
Build logging, recording, replay and observability - the ability to take any run at sea and reproduce it exactly on a desk
Integrate and operate the simulation environment (SIL)
Own reliability, timing and performance of the stack on embedded hardware