לוח משרות דרושים מהנדס וריפיקציה | ולידציה בהרצליה

In this highly visible position you will be working on best in class SoC.
You will be in charge of SW development for Silicon validation purposes. You will be working on design, development and integration of complex drivers, tests and SW infrastructure, as well as SoC Bring-ups and complex debug activities. Imagine what do you could do here.

Ready for an intellectual challenge that combines Mathematics and CS theory in the context of hardware development? Keep reading.
In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence
Not in the Formal domain? No worries, we offer thorough training to learn the theory and practice directly from our team experts
In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence .
The position is relevant for both Herzliya/ Haifa site

Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. We are looking for a Senior ASIC Verification engineer with good grasp of the entire verification process – plan, execution and sign-off, excellent analytical skills, technical skills and high motivation to join our team and take part of the success. What you will be doing:
* Create a thorough verification plan out of IP specification and implement it to completeness.
* Build UVM-compliant IP verification environment from scratch.
* Debug to find root cause of issues.
* Full-chip verification from planning stage to tape-out, including gate-level testing.
* Testing using both System Verilog and C.
* Work in a diverse environment, collaborating with power engineers, communication experts and SW developers.

Country:
Israel

City:
Herzliya