Were hiring an experienced verification engineer to join our team developing advanced telecommunications ASIC/FPGA products. You will join RADs family, as part of our team in Beer-Sheva.
Responsibilities:
Build and maintain verification environments (SystemVerilog/UVM or Specman)
Develop test plans and run constrained-random & directed tests
Debug, analyze coverage, and work closely with design teams
Contribute to methodology and process improvements
Requirements: BSc/MSc in EE/CE or related field
5+ years of ASIC/FPGA verification experience
Strong in SV/UVM or Specman
Scripting (Python/Bash), Linux
Great debugging and teamwork skills
This position is open to all candidates.