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A leading and innovative company in the field of cyber threat intelligence is looking for a Full Stack Team Lead to join our growing engineering group and lead one of our full stack teams. As a Full Stack Team Lead, you will play a key role in shaping and developing our products end to end, from system design and architecture to implementation of microservices and modern web interfaces. You will combine people leadership with hands-on technical leadership, working closely with product to deliver reliable, scalable solutions that directly support the companys growth and business goals.



What Youll Be Doing

● Lead and grow a full stack engineering team, creating a culture of ownership, quality, and continuous improvement.

● Own the design, development, and delivery of full stack services, APIs and microservices-based environment.

● Work closely with Product to translate business and intelligence needs into scalable technical solutions.

● Drive technical and architectural decisions within your domain, balancing performance, reliability, and cost.

● Maintain high engineering standards through code reviews, testing, and CI/CD best practices.

● Be hands-on in the code (around 50-60%), leading by example.

● Take full ownership of your teams roadmap, delivery, and technical health.

● Technology stack includes: TypeScript (NestJS / Node.js / Angular), MongoDB, PostgreSQL, Elasticsearch, MySQL, RabbitMQ, Kafka, Docker, Kubernetes, AWS, IaC, and more.

In this role you will develop system level software, targeting chip architecture, functional correctness and performance, running on various platforms and validating chip functionality.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification in our company isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development
What sets us apart:
Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips.
Cutting-edge methodologies drive every stage of our verification process
Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality.
We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality.
Performance optimization at all levels it is at the heart of our targets on top of logical correctness verification.
If you want to be at the nerve center of chip development - where your work connects every discipline and powers the backbone of AWS Graviton - this is your team.

In this highly-visible role you will assume responsibility over a full range of DFT in an extremely challenging project, leading a talented team of engineers, working closely with frontend and backend teams. You will participate in architecture and design reviews, create design solutions for testability, debug ability, reliability and yield improvement. You will provide design constraints for implementation and sign-off. You will build work plans, drive and track their execution. You will be closely involved in silicon bring-up, reliability testing and advanced physical failure analysis activities, and will be responsible for getting a high-quality product out into AWS fleet for millions of our customers quickly. Come and join us as we work hard, have fun, and make history.

We are seeking Senior Software Program Manager
Meet the Team
Silicon One leads ASIC design for next-generation network devices, shaping the future of networking in the AI/ML era with industry-leading silicon solutions. Our technology delivers high speed, programmability, power efficiency, and scalability while supporting Open Standards, Open Networking, and cloud data centers.
As part of the Silicon One team, you will work alongside talented engineers and innovative customers to build world-class products. The team spearheads SDK development for multiple generations of our ASIC families, enabling advanced networking capabilities across diverse platforms.
Your Impact
You will lead sophisticated, multi-functional programs spanning silicon development, firmware, and system delivery, driving execution from initial concept through production. You will collaborate with engineering and operations teams to deliver high-quality solutions, craft effective processes, and ensure strategic alignment across the organization.
Specific Responsibilities include:
Driving end-to-end program execution for the Silicon One ASIC software ecosystem, including integration with industry-leading network operating systems.
Serving as a key interface for New Product Introduction (NPI) programs for next-generation Silicon One devices.
Leading cross-functional alignment across engineering teams in a globally distributed environment.
Owning program schedules, milestones, dependencies, risk management, and executive communications.
Partnering with software engineering leaders to ensure tight hardware/software co-development and integration.
Liaising with our internal business units and customers to collect requirements and manage prioritization across competing stakeholder interests.
Driving accountability for outcomes while working through influence in environments with high ambiguity, rapid change, and ambitious timelines.

We are seeking Senior Software Program Manager
Meet the Team
Silicon One leads ASIC design for next-generation network devices, shaping the future of networking in the AI/ML era with industry-leading silicon solutions. Our technology delivers high speed, programmability, power efficiency, and scalability while supporting Open Standards, Open Networking, and cloud data centers.
As part of the Silicon One team, you will work alongside talented engineers and innovative customers to build world-class products. The team spearheads SDK development for multiple generations of our ASIC families, enabling advanced networking capabilities across diverse platforms.
Your Impact:
You will lead sophisticated, multi-functional programs spanning silicon development, firmware, and system delivery, driving execution from initial concept through production. You will collaborate with engineering and operations teams to deliver high-quality solutions, craft effective processes, and ensure strategic alignment across the organization.
Specific Responsibilities include:
Driving end-to-end program execution for the Silicon One ASIC software ecosystem, including integration with industry-leading network operating systems.
Serving as a key interface for New Product Introduction (NPI) programs for next-generation Silicon One devices.
Leading cross-functional alignment across engineering teams in a globally distributed environment.
Owning program schedules, milestones, dependencies, risk management, and executive communications.
Partnering with software engineering leaders to ensure tight hardware/software co-development and integration.
Liaising with our internal business units and customers to collect requirements and manage prioritization across competing stakeholder interests.
Driving accountability for outcomes while working through influence in environments with high ambiguity, rapid change, and ambitious timelines.

We are excited to announce that the Silicon One team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team:
Join the Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Our silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed.

DFT Intern - ASIC Student - Israel - ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Who We Are
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.
The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.
What You'll Do
Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.

Required PHY Post Silicon Validation Engineer
Job Description
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
You'll be part of our Group driving our game changing next generation network devices - Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment. As a Wireless MAC System Architect, you will be a core member of our highly innovative and visible Wireless System-on-Chip (SoC) design team that defines modem architectures, develops MAC-layer algorithms, and invents embedded DSP algorithms for chips enabling exciting new wireless applications. You will be responsible for developing state-of-the-art wireless SoC products that are enjoyed by millions of our customers. Application areas include ultra-wideband sensing and specialized wireless audio; products enabled or improved by our teams SoCs include specialized audio headsets (such as AirPods), watches and iPhones.

In this role you will be responsible for the architecture of the Connectivity IP with focus on the MAC sub-system: - Define, document and Spec Connectivity MAC architecture and performance requirements.
- Analyze & simulate the performance of the Connectivity IP in real-life use-cases, achieving benchmarking performances in several metrics, including Throughput, Robustness, Co-existence with other Wireless IPs and more.
- Working closely with other architects (PHY, Power Management, FW and SW) to introduce best in class Connectivity IP solution.
- Develop innovative system architectures and protocols to deliver best-in-class performance for the MAC subsystem of custom wireless silicon solutions.
- Introduce cross-domain features where opportunities exist for innovation to achieve enhanced performance.
- Produce MAC architecture, specifications and corresponding performance/reference modeling in support of digital HW and FW design and verification efforts.
- Develop and maintain a MAC systems infrastructure applying the best methodologies for system-level simulation, pre-silicon prototyping (including emulation and FPGA prototyping), FW QA, regression and MTBF testing, and system verification to ensure first-time design success.
- Support the delivery of new wireless technologies to the Product Systems teams.

Required PHY System
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are seeking a CAD LEQ (Logical Equivalence Checking) Engineer to develop, deploy, and support equivalence checking methodologies across complex SoC programs. This role focuses on ensuring functional correctness between RTL, synthesized netlists, and post-implementation designs, while driving scalable, robust sign-off flows.

Responsibilities
Own and maintain LEQ sign-off methodology across RTL-to-GDS flows.
Develop and support flows using tools such as Cadence Conformal and equivalent industry solutions.
Drive power-aware equivalence checking including CPX flows.
Enable ECO flows, ensuring safe and correct implementation of late-stage design changes.
Debug equivalence failures and perform root-cause analysis across RTL, synthesis, and PnR stages.
Collaborate with design, synthesis, PD, and power teams to resolve mismatches and improve convergence.
Optimize runtime, capacity, and scalability of LEQ flows for large SoCs.
Define best practices, guidelines, and automation for LEQ usage across projects.
Partner with EDA vendors to resolve tool issues and drive feature improvements.

We are looking for an experienced Architect to own and evolve the architecture of our companys cloud-based products. The role requires strong hands-on expertise in AWS-based SaaS platforms, the ability to design highly scalable and secure multi-tenant systems, and leadership to guide engineering and DevOps teams in building reliable cloud solutions while driving innovation through AI capabilities.
Key Responsibilities:
Cloud Architecture & Ownership:
Own the end-to-end architecture for all company cloud products
Design, plan, and implement cloud architectures aligned with business and technical requirements
Define cloud topologies addressing uptime, stability, redundancy, scalability, capacity planning, security, performance tuning, and observability
Ensure architecture supports multi-tenant SaaS environments
Design, Innovation & Roadmap:
Drive technology and cloud architecture roadmaps
Bring innovative ideas and propose modern cloud-native solutions
Continuously evaluate new cloud services and technologies to improve platform reliability and efficiency
Implementation & DevOps Collaboration:
Work closely with DevOps teams to ensure correct implementation, deployment, and operational excellence
Guide best practices for CI/CD, automation, monitoring, and incident response
Support R&D teams on cloud-related design and implementation topics
Reliability, Security & Optimization:
Architect solutions focused on high availability, disaster recovery, and fault tolerance
Define security architecture, access control, data protection, and compliance standards
Drive cloud optimization for cost, performance, and scalability
Leadership & Execution:
Lead, mentor, and influence engineering teams on cloud architecture best practices
Effectively multitask and context-switch across multiple initiatives and teams
Deliver high-quality outcomes under tight deadlines and pressure
Collaborate across teams with a strong sense of ownership and accountability

Join a highly skilled engineering team building core storage infrastructure across multiple system layers. You'll develop and enhance frameworks that handle disk image operations, provide unified storage abstractions, and enable cutting-edge virtualization technologies. This role requires both breadth and depth, comfortable working from kernel-level drivers to user-space frameworks, debugging complex multi-layered systems, and collaborating across hardware, kernel, and application teams. You'll participate in all phases of development: architecture, implementation, optimization, testing, and integration with deeply integrated platform features.

Responsibilities:
Develop kernel-level storage components and user-space frameworks for macOS and our other platforms.
Optimize I/O performance, resource utilization, and power efficiency across the storage stack.
Debug and resolve complex issues spanning hardware, firmware, kernel, and user-space boundaries.
Collaborate with cross-functional teams, including hardware, kernel, filesystem, and virtualization engineers.
Write comprehensive test suites, performance benchmarks, and technical documentation.
Contribute to architecture decisions and long-term technical direction for storage systems.

Required Performance Architect
Job Description
What You'll Do
Join our Silicon One architecture team, the core of silicon development. Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.
Who You'll Work With
You will be part of our Silicon One architecture team, which is central to our ASIC group.
Our team, which operates with a startup mentality within a stable and leading corporation, drives the development of next-generation networking devices-Silicon One.
Our design center is unique, hosting all silicon hardware and software development disciplines at one site. We are revolutionizing the industry by building a new internet for AI networks and the 5G era, with a unified, programmable silicon architecture that will underpin all of our future routing and switching products.
Our devices are engineered to be adaptable across service providers and web-scale markets, designed for both fixed and modular platforms. They deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. Silicon One is set to be a transformative technology for decades to come.