דרושים » הנדסה » AI Specialist Engineer

We're looking for a Senior AI Infrastructure Engineer to join a group that specializes in Security and Networking, and specifically ML/AI, MLOps, and agentic AI development. As a Senior AI Infrastructure Engineer, youll build and maintain the infrastructure, tools and processes necessary to support the AI lifecycle in a production environment. You will collaborate closely with data scientists, software engineers, and security architects to ensure smooth development, deployment, evaluation, and optimization of AI pipelines, models, and agents. This role requires a balance of high-level engineering rigor and a collaborative spirit; youll be a technical anchor and a supportive peer for teams across the organization.



What youll be doing:

Architecting, developing and optimizing scalable infrastructure for deploying security and networking AI models and agents in production.

Managing ML/agentic workflows to ensure performance, high availability, resource efficiency, and cost-effectiveness.

Designing and implementing pipelines and frameworks for AI training, inference, and experimentation.

Partnering with data scientists and security architects to operationalize AI agents, including packaging and integration with existing systems. This includes contributing to and reviewing code, design documents, and test plans.

Partnering with DevOps teams to integrate pipelines and workflows into CI/CD processes, ensuring reliable deployments and rollbacks.

Building proactive monitoring systems to identify issues in quality and infrastructure before they impact production.

Implementing access controls, authentication mechanisms, and encryption standards to keep our AI models and data secure.

Documenting guidelines and leading knowledge-sharing sessions to elevate the teams collective development expertise.

In this role, you will be shaping the future of our companys AI software stack for Neural Processing Units (NPUs). You will lead software architecture, define performance-critical components, and enable efficient execution of advanced neural networks under tight power, memory, and latency constraints.
You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of our company NPU embedded solutions, actively promoting our company AI capabilities to the customers.
We are seeking a high-impact motivated Software Architect to join our team and help shape the future of our advanced neural network AI Software Toolchain over our companys AI computing processors.
Responsibilities
Lead Software Architecture specification and supervise design for the most advanced Software Toolchain handling state-of-the-art Neural Processing Unit operation.
Design and promote holistic software solutions incorporating various aspects of NPU handling: from network retraining, graph compiling and network inference execution on the embedded systems.
Collaborate proactively with Product, Architecture, VLSI and Software teams to promote software leadership over various markets and compute SoCs.
Explore and translate state-of-the-art neural network and AI applications requirements into software architecture flows, encompassing hardware, software, tools and other components.
Evaluate architecture proposals, internal and external IP features and provide influential and inspirational leadership across hardware and software to align all parties to a common vision of architecture & technology development.
Represent our company with high technical credibility in customer meetings, appropriately incorporating feedback.
Boost velocity of development teams by providing technical guidance and by constantly looking ahead to anticipate and resolve future challenges.
Conduct experiments, invent and drive development of supporting tools such as simulators, models, profilers, and other methods as required.
Engage with engineering leadership and product planning stakeholders to develop technology roadmap.

In this role, you will be a key contributor to the design and implementation of our companys AI Graph Compiler software stack for Neural Processing Units (NPUs). You will take part in defining software architecture, implementing performance-critical components, and enabling efficient execution of advanced neural networks under tight power, memory, and latency constraints.
You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of our company NPU embedded solutions, actively promoting our company AI capabilities to the customers.
What will you do:
Own and design key components of the AI Graph Compiler software stack for NPU-based systems.
Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.
Collaborate on HW-SW co-design, influencing NPU architecture.
Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.
Mentor junior engineers and contribute to technical best practices.

In this role, you will be a key contributor to the design and implementation of our companys Edge AI software stack for Neural Processing Units (NPUs). You will take part in defining software architecture, implementing performance-critical components, and enabling efficient execution of advanced neural networks under tight power, memory, and latency constraints.
You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of our company NPU embedded solutions, actively promoting our company AI capabilities to the customers.
What will you do:
Own and design key components of the Edge AI software stack for NPU-based systems.
Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.
Collaborate on HW-SW co-design, influencing NPU architecture.
Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.
Mentor junior engineers and contribute to technical best practices.

As AI Quality Architect, you are the person who makes quality native to the agentic SDLC. You design the systems, standards, and intelligence layers that ensure every stage of an AI-accelerated pipeline - from requirement ingestion to autonomous deployment - is observable, trustworthy, and continuously improving. You don't retrofit testing onto AI workflows; you architect quality into them from the ground up.
How will you make an impact?
Agentic Quality Architecture
Design the end-to-end quality architecture for agentic SDLC pipelines - spanning requirement analysis, code generation, test creation, execution, triage, and release gates
Define how quality agents are orchestrated: which decisions they own autonomously, which require human-in-the-loop checkpoints, and how confidence thresholds govern both
Architect multi-agent quality workflows: requirement validation agents, test generation agents, failure triage agents, and regression analysis agents working in coordinated pipelines
Establish trust and verification models for agent-produced artifacts - test code, assertions, coverage reports, and defect analyses must all be auditable and traceable
Own the architectural patterns for quality feedback loops between agents: how a deployment agent learns from a triage agent's findings, and how that signal improves future generation
AI-Native Test Engineering Platform
Design and own the LLM-powered test generation platform - from natural language requirement ingestion to executable, maintainable test output
Architect the evaluation harness that continuously measures test generation quality: coverage delta, false-positive rates, assertion accuracy, and maintenance burden over time
Build the self-healing test infrastructure layer - agents that detect broken selectors, drifted APIs, or changed behaviors and propose or apply fixes autonomously
Define the prompt engineering standards, context injection patterns, and RAG architectures that ground test generation agents in real codebase context
Architect test artifact governance: versioning, ownership attribution (human vs. agent), rollback capability, and confidence scoring for every generated artifact
Quality Gates in Autonomous Pipelines
Design intelligent, adaptive quality gates that operate at the speed of agentic CI/CD - gates that reason about risk, not just pass/fail thresholds
Build risk-scoring models that dynamically adjust gate strictness based on change scope, code origin (human vs. AI-generated), historical failure patterns, and deployment context
Architect the observability layer for agentic pipelines: what signals indicate a pipeline agent is making poor quality decisions, and how are those signals surfaced in real time
Define the integration patterns between quality gates and orchestration platforms (LangChain, LlamaIndex, custom agent frameworks) used across the engineering org
Establish rollback and circuit-breaker patterns for autonomous deployments triggered by quality signal degradation.

As AI Quality Architect, you are the person who makes quality native to the agentic SDLC. You design the systems, standards, and intelligence layers that ensure every stage of an AI-accelerated pipeline - from requirement ingestion to autonomous deployment - is observable, trustworthy, and continuously improving. You don't retrofit testing onto AI workflows; you architect quality into them from the ground up.
How will you make an impact?
Agentic Quality Architecture
Design the end-to-end quality architecture for agentic SDLC pipelines - spanning requirement analysis, code generation, test creation, execution, triage, and release gates
Define how quality agents are orchestrated: which decisions they own autonomously, which require human-in-the-loop checkpoints, and how confidence thresholds govern both
Architect multi-agent quality workflows: requirement validation agents, test generation agents, failure triage agents, and regression analysis agents working in coordinated pipelines
Establish trust and verification models for agent-produced artifacts - test code, assertions, coverage reports, and defect analyses must all be auditable and traceable
Own the architectural patterns for quality feedback loops between agents: how a deployment agent learns from a triage agent's findings, and how that signal improves future generation
AI-Native Test Engineering Platform
Design and own the LLM-powered test generation platform - from natural language requirement ingestion to executable, maintainable test output
Architect the evaluation harness that continuously measures test generation quality: coverage delta, false-positive rates, assertion accuracy, and maintenance burden over time
Build the self-healing test infrastructure layer - agents that detect broken selectors, drifted APIs, or changed behaviors and propose or apply fixes autonomously
Define the prompt engineering standards, context injection patterns, and RAG architectures that ground test generation agents in real codebase context
Architect test artifact governance: versioning, ownership attribution (human vs. agent), rollback capability, and confidence scoring for every generated artifact
Quality Gates in Autonomous Pipelines
Design intelligent, adaptive quality gates that operate at the speed of agentic CI/CD - gates that reason about risk, not just pass/fail thresholds
Build risk-scoring models that dynamically adjust gate strictness based on change scope, code origin (human vs. AI-generated), historical failure patterns, and deployment context
Architect the observability layer for agentic pipelines: what signals indicate a pipeline agent is making poor quality decisions, and how are those signals surfaced in real time
Define the integration patterns between quality gates and orchestration platforms (LangChain, LlamaIndex, custom agent frameworks) used across the engineering org
Establish rollback and circuit-breaker patterns for autonomous deployments triggered by quality signal degradation.

In this role, you will be a key contributor to the design and implementation of our companys AI Graph Compiler software stack for Neural Processing Units (NPUs). You will take part in defining software architecture, implementing performance-critical components, and enabling efficient execution of advanced neural networks under tight power, memory, and latency constraints.
You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of our company NPU embedded solutions, actively promoting our company AI capabilities to the customers.
What will you do:
Own and design key components of the AI Graph Compiler software stack for NPU-based systems.
Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.
Collaborate on HW-SW co-design, influencing NPU architecture.
Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.
Mentor junior engineers and contribute to technical best practices.

In this role, you will learn and deeply understand the AI fundamentals and create tools and software that transform AI network into embedded implementation on our companys processors. In addition, you will perform in-depth analysis and optimization to the generated software and tools, to ensure the best performance and accuracy on various our company s processors architectures.
Responsibilities:
Taking part of innovative, agile, top-notch SW team, designing Neural Network Processor (NPU) graph compiler and software in close collaboration with the architecture, algorithms, system and hardware teams.
In addition You will take part in designing and developing software code for graph compiler for neural network processing and embedded system resources management.