דרושים » תוכנה » Embedded Systems Software Architect

Required Machine Learning Hardware Architect, Hardware, Software Co-Design, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Machine Learning Hardware Architect within the Co-design team, you will serve as a technical lead bridging model architecture innovation and next-generation hardware design. Operating at the highest levels of AI research and engineering, you will define the goal and architectural roadmap for our future machine learning serving and training capabilities. You will guide the integration of ML research such as massive-scale foundation models with advanced silicon architectures to create industry-leading, high-performance, and power-efficient accelerators.
Responsibilities
Define and drive the technical roadmap and architecture for the hardware/software stack to ensure exceptional performance for ML models. Act as the technical liaison across research, software, and hardware teams, steering model architecture innovation to maximize scaling, quality, and hardware efficiency.
Architect next-generation configurable simulation frameworks and performance models, setting the organizational standard for evaluating complex microarchitectural decisions. Drive high-stakes choices regarding Power, Performance, Area (PPA) and buildability for future chip and system architectures, expertly balancing long-term technological trends with strict product delivery timelines.
Guide system-level performance analysis across highly distributed ML systems, innovating new methodologies to optimize and balance compute, memory bandwidth, and inter-chip network requirements. Their leadership will directly shape the future of high-performance AI infrastructure and hardware-software co-design.
Manage cross-functional partnerships across hardware, compiler development and ML teams.

our company Autonomous Driving software group is looking for a Linux kernel expert with deep knowledge in the PCIe standard. As a Linux Kernel PCIe Architect, you will be part of the OS Architecture team and will be responsible to define the operating system solutions based on the PCIe standard for connectivity with peripherals and as an interconnect between multiple EyeQ SoCs.
This is an exciting and unique opportunity to work with highly talented Linux OS architecture and developments teams and be a leader in the definition of the cutting-edge technology for the Automotive AI applications.
What will your job look like?
Researching and defining the SW solutions based on the PCIe standard and the Linux implementation for the PCIe stack
Designing and Implementing the SW Stack for the communication between the EyeQ SoCs laying the infrastructure for cross chip neural networks.
Defining the future HW solutions by working closely with the SoC Architecture team in a SW/HW co-development environment.
Performing performance analysis, feasibility studies, PoCs and optimization flows to achieve the highest performance with minimal resources.
Work closely with the Linux Kernel team and provide the technical guidance and mentoring for development engineers.

our companys Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
In our company, Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5/6, PCIe Gen4/5, CDPHY, and MPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SIPI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our companys EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions and automation, validation SW tools development, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

our Embedded Division is looking for Embedded Developer to join our growing design house.
Our products and projects are in the fields of IoT, Cyber, RF, Networking, Smart-Home, Military, Medical, Low-Power, Autonomous Vehicles, Drones and much more!
You will join our embedded team in super-dynamic environment, get the ability to be exposed to the latest technologies and trends.
You MUST be fast learner to absorb new technologies
Responsibilities:
Find solutions in complex embedded environments
Lead embedded architectures from requirements to production
Lead highly-complex systems, involving FPGAs, SOCs, RF, Mobile apps, and cloud
Design, Implement and deliver directly to the customer
Collaborate with other teams members from mobile, cloud, FPGA, Hardware and mechanics

we are looking for a Computing Network & System Architecture Group Leader.
In this role, you will be responsible for several teams of architects, engineers and software developers, all working together to conduct state-of-the-art R&D in system and network architecture.
As the group lead, you will guide and mentor the individual team leads, and also conduct hands-on work leading architecture, technology innovation and technical planning and of high-performance computing cluster network, which oriented at AI, HPC, and big data.

Required SoC Input Output Architect, Silicon, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our Silicon team is driving the future of cloud data center computing. As a System on Chip Input Output (SoC IO) Architect, you will help define a new generation of our products. You will have pivotal responsibilities and serve as the organization Mobile Industry Processor Interface (MIPI) focal point.
Responsibilities
Evaluate different silicon solutions for executing Mobile Industry Processor Interface and other input/output peripheries, off-the-shelf components, vendor co-developments, and custom designs.
Drive vendor execution in various engagements, standard component, build to specification, and co-developments.
Collaborate with software, design, verification, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Create high performance hardware/software interfaces.
Collaborate in developing a new SoC.