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חברה חסויה
Location: Haifa
Job Type: Full Time
we are looking for an Emulation Engineer to join our Radar VLSI team and drive the development of next-generation ASIC Sensors.
We are developing best-in-class automotive radar solutions to complement our companys autonomous driving platform. Joining our expert team, you will leverage our companys unique assets to work on cutting-edge technology in a dynamic and challenging environment.
What will your job look like?
In this role, you will build high-end Emulation environments based on new designs. The position involves building and integrating complex components, working with cross-functional engineering teams, and developing systems that will change the way we drive.
We are looking for an engineer who thrives on challenges and is committed to engineering excellence while navigating complex constraints.
Lead Emulation development for the VLSI team.
Work closely with SW, Logic, and Verification engineers.
Serve as an expert matter for your domain, with full responsibility for driving and implementing improvements and new ideas.
Requirements:
BSc in Electrical Engineering, Computer Science, or Computer Engineering.
5+ years of experience in Emulation, including hands-on experience with tools such as Palladium, ZeBu, or Haps.
3+ years of experience in Logic Design (Verilog/System Verilog) or Verification (UVM)- an advantage.
Hands-on experience in bring-up and debugging of PCBs with standard digital interfaces (e.g., SPI, I2C, MIPI) - an advantage.
Experience working with multiple cross-functional teams (Software, Logic, Verification).
Experience using standard lab equipment (e.g., multimeters, oscilloscopes, spectrum analyzers).
A team player with excellent communication skills.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Emulation Hardware Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Maintain and upgrade emulation models and infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team and customers, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic design automation (EDA) tools, licensing, and job management in our infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., DDR, Peripheral Component Interconnect Express (PCIe), Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Experience with associated EDA tools, automation, and flow enhancements.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with FPGA systems (e.g., EP, HAPS, Protium).
Experience with hybrid emulation or speed bridges.
Experience with coding in Verilog/SystemVerilog for design.
Experience with design debug tools (e.g., Verdi, Verisium).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Emulation Verification Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
8 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Experience with associated electronic design automation (EDA) tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog for design.
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
Understanding of register transfer level (RTL) to emulation/field-programmable gate array (FPGA) flows including emulation test benches (e.g., transactors/accelerated verification intellectual properties (VIPs), hybrid, in-circuit emulation).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Test and DFT Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Bui
Requirements:
Minimum qualifications:
Bachelor's degree in Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, automatic test equipment (ATE) program development, and post-silicon enabling from new product introduction (NPI) through high-volume manufacturing.
Experience with ASIC test methodologies (MBIST, ATPG, DFT, SerDes, and sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
our company's Automated Driving group in Haifa is looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.
At our company's Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts - as it required by the Automotive and Safety related products market (ISO26262).
Requirements:
At least 5 years of experience in the ASIC/SoC industry
Excellent communication skills
BSc or MSc in Computer Engineering or Electrical Engineering
The following knowledge/experience will serve as a big advantage for candidates
Proven Experience in either SCAN or MBIST tools and flows
Knowledge of Hierarchical SCAN methodology
Knowledge of Logic BIST (LBIST) and Test Point Insertion (TPI) flows
Knowledge of TAP protocols IEEE 1149.1/1500/1687 (iJTAG)
Knowledge of Synthesis flows.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required AI SoC Design Verification Engineer, Cloud

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining what’s possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. 
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Post-Silicon Validation Engineer, Networking
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We are building a new team to lead the post-silicon validation efforts for our cutting-edge product. We're looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact.
As a Silicon Validation Engineer, you'll play a pivotal role in the validation of our custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Conduct in-depth analysis into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities.
Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on Pre-Silicon (Pre-Si) emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues.
Contribute to the development of test infrastructure and methodologies to improve validation efficiency and coverage.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
8 years of experience with functional tests for silicon validation (i.e., writing in C or C++ or Python or similar).
8 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Ability to learn new systems quickly and work on their own in a changing environment.
Excellent communication and collaboration skills.
Excellent problem-solving skills.
Passion for technical issues with and a strong sense of ownership.
Interest in hardware and a passion for transitioning into silicon validation.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required CPU Emulation Technical Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Define the emulation strategy, identify platforms and technologies to support all customers.
Explore emulation methodologies, gather feedback from customers, and implement emulation workflows at scale.
Support emulation customers with debugging hardware, software, tooling, and project-specific issues.
Create tooling and automation to support emulation tools, licensing, and job management in our infrastructure.
Act as a primary interface to emulation vendors.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience working with emulation languages such as C, C++ and scripting such as Python and chip design flow.
Experience in leading an emulation team/project.
Experience in leading technical teams and building cross-functional relationships.
Experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with various emulation technologies (Transactors, In-circuit Emulation, Hybrid), flows (Assertions, Coverage, UPF, Power), Debugging and Performance of compile and runtime environments.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with Field-programmable Gate Array (FPGA) systems (e.g., EP, HAPS, Protium).
Experience with verification techniques, and full verification life-cycle.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Requirements:
BSc or MSc in Computer Engineering or Electrical Engineering.
5+ years of experience in the Physical Design field
Proficiency in scripting languages (Tcl, Python, Perl, or tcsh).
A team player with excellent communication skills and a can-do attitude
Experience in developing or maintaining implementation tools and design flows - an advantage
Experience with high-speed interfaces (DDR/PCIE) - an advantage.
Experience with advanced nodes (5nm and below) - an advantage.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Architect, Digital Signal Processing, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Staff Engineer on the Digital Signal Processing team, you will be a technical leader responsible for architecting and developing the core algorithms that power our next-generation data center interconnects. You will leverage your expertise in communication theory, forward error correction (FEC), and modulation to design novel, low-complexity solutions that push the boundaries of speed and reliability.
In this role, you will not only define the technical direction for critical projects but also mentor other engineers and collaborate across hardware and software teams to bring your goal to life in silicon.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the architecture, design, and implementation of digital signal processing (DSP) algorithms for high-speed optical communication systems. Drive the long-term technical roadmap for our signal processing and communication architectures by staying current with academic and industry trends.
Develop and analyze novel forward error correction (FEC) and modulation schemes to optimize for performance, power, and complexity tradeoffs.
Create comprehensive system-level models using tools like Matlab, Python, or C++ to simulate and validate algorithm performance.
Collaborate closely with logic design, verification, and software teams to ensure the successful implementation, integration, and bring-up of algorithms in custom silicon.
Provide technical leadership and mentorship to a team of DSP and communication systems engineers, fostering innovation and engineering excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
10 years of experience in digital signal processing, communication theory, and algorithm development.
Experience in the design and implementation of algorithms for communication systems, including FEC or modulation techniques.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
Experience in the theory and practical implementation of modern FEC codes (e.g., LDPC, staircase, polar codes) and advanced modulation formats.
Experience in designing and modeling high-speed optical communication transceivers or similar high-bandwidth systems.
Experience leading the development of algorithms from initial concept through to successful silicon production.
Strong publication record in conferences or journals in the field of communications or signal processing.
Excellent programming skills in Matlab for algorithm development, simulation, and analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8721010
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We are building a new team to lead the post-silicon validation efforts for our product. We are looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact.
As a Silicon Validation Engineer at Cloud, you will play a pivotal role in the validation of our custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
Responsibilities
Dive into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities.
Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on Pre-Si emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues.
Collaborate closely with Architects, Designers, and other teams to drive bug fixes and ensure feature functionality.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience with functional tests for silicon validation (i.e., writing in C or C++ or Python or similar).
4 years of experience in pre-silicon or post-silicon validation.
4 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience in software engineering, with focus on hardware or silicon validation.
Ability to learn new systems quickly and work separately in a fast-paced environment.
Excellent communication and collaboration skills.
A passion for deep technical challenges, excellent problem-solving skills, and a strong sense of ownership.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8718716
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שירות זה פתוח ללקוחות VIP בלבד