דרושים » תוכנה » Firmware Engineer - Ethernet Switching

We are seeking to hire an expert Firmware Design Engineer for the Ethernet Switch Firmware Core team. The next generation of Switches are a crucial component of the most innovative AI and Cloud Computing Networks in the world. As a member of the Ethernet Firmware Team, you will craft and develop the firmware abstraction layer in the ETH Switch. This role will require you to participate in the design & development of firmware while working closely with hardware and architecture team to ensure timely delivery of our products to the market.

What you'll be doing:

Highly involved in the entire software development process from architecture to integration testing of firmware for the Spectrum ASIC product line.

Work with HW & ASIC team to provide insights into developing the next gen of the groundbreaking of silicon and systems.

Design and implement algorithms to improve system scale and performance.

Work with higher layer software teams to debug issues reported by customers (internal and external).

Design, implement and integrate new features according to the product roadmap.

Have a new insight on how to improve our software? Why not! Bring your ideas to life by innovating during our hackathons

Collaborate with other R&D teams around the globe.

We are looking for an excellent Firmware Design Engineer for our FW PHY Group. The person will closely work with our FW PHY development, architecture teams and gain a deep understanding of our Networking products and technologies. If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us!

What you'll be doing:

Work on developing the next generation PHY layer for the Ethernet Switch and NIC (network adapter) product lines.

Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups.

Innovate! Bring our products to the next quality level.

We are looking for a Senior Software Engineer. You will work with highly experienced engineers to provide the world's outstanding SmartNIC products for cloud-computing, research, medical, automotive, finance, weather, telco, and more.

What you'll be doing:

You will architect, design, and develop the next-generation technology in network acceleration, as well as work with best-in-class technical leaders in this domain.

Engage with customers and architects to understand the requirements and derive the software design accordingly.

Collaborate with other engineering teams that develop the upper layers applications like virtual switches (OVS, VPP, and etc.) and lower layers like driver, kernel, FW, and HW.

We are looking for an experienced, hands-on Team Manager.

As Team Manager you will be responsible for managing the development of enterprise grade software for monitoring and doing critical performance analysis for the world's largest supercomputers and data centers, built on our GPU and networking hardware. This role offers you an excellent opportunity to deliver production grade solutions, get hands on with ground-breaking technology, and work closely with technical leaders solving some of the biggest challenges in managing large scale networking and computing infrastructure.

What you'll be doing:
The team is responsible for developing monitoring and telemetry infrastructure for production environments, running on the worlds largest supercomputers and datacenters. The work environment is dynamic and challenging; we are innovating and inventing software products at the forefront of technology in terms of performance, scalability, and features. Our team works closely with other stakeholders to co-design new features and software APIs.

In this role, you will be a key contributor to the design and implementation of AI Graph Compiler software stack for Neural Processing Units (NPUs). You will take part in defining software architecture, implementing performance-critical components, and enabling efficient execution of advanced neural networks under tight power, memory, and latency constraints.

You will work closely with hardware and system architects, software and hardware engineers, influencing both software and hardware decisions. You will design and implement major parts of NPU embedded solutions, actively promoting AI capabilities to the customers.

What will you do:

Own and design key components of the AI Graph Compiler software stack for NPU-based systems.

Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.

Collaborate on HW-SW co-design, influencing NPU architecture.

Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.

Mentor junior engineers and contribute to technical best practices.

In this role, as Embedded Software Team Leader, you will lead a software team taking major part in developing AI framework. This framework is at the heart of the AI software offering, with deep impact on multiple hardware and software teams ability to execute state of the art LLM, Generative AI and Neural Networks with extraordinary performance. You will lead a team of creative and result oriented enthusiasts that invent, design, and implement software that enables smooth connectivity between the NPU and Host CPU.

Key Responsibilities:

Lead and manage the Embedded Software engineering team, ensuring high performance and productivity. Oversee the design, development, and implementation. Collaborate with cross-functional teams to integrate solutions. Provide technical guidance and mentorship to team members. Ensure project timelines and deliverables are met. Conduct performance reviews and support professional development of team members. Collaborate globally with architects, HW teams, NPU teams, and other developer teams.

The AI Graph Compiler Engineer will design and develop next-generation graph compiler technologies enabling efficient execution of advanced AI models on Neural Processing Units (NPUs) used in edge and embedded AI devices. In this role, you will work at the intersection of AI frameworks, graph optimization, and hardware acceleration, enabling efficient execution of neural networks on cutting-edge AI hardware.

You will work at the intersection of AI frameworks, compiler infrastructure, and hardware acceleration, helping translate high-level AI models into highly optimized executions on NPUs.



What will you do:

Develop and enhance AI graph compiler components targeting NPU architectures. Implement graph-level optimizations such as operator fusion, scheduling, memory planning, and layout transformations. Participate in lowering models from AI frameworks (e.g., PyTorch, ONNX, TensorFlow) into NPU-optimized representations. Contribute to compiler passes focused on performance, memory efficiency, and numerical correctness. Collaborate closely with hardware, runtime, and AI framework teams to achieve optimal end-to-end performance. Analyze performance bottlenecks and assist in compiler-based optimizations. Debug and resolve issues across compiler, runtime, and hardware layers. Support testing, validation, and documentation of compiler features.

Own and design key components of the Edge AI software stack for NPU-based systems.

Optimize inference performance (latency, throughput, memory footprint, power) for edge deployments.

Collaborate on HW-SW co-design, influencing NPU architecture.

Support IP evaluations and silicon bring-up, root-cause complex HW/SW issues, and influence development methodologies.

Mentor junior engineers and contribute to technical best practices.

As a Graph Compiler Software Manager, you will lead the development of next-generation graph compiler technology. This compiler is a cornerstone of AI software offering, empowering customers to optimize, map, and execute complex neural networks across architectures with extraordinary efficiency. You will lead a group of talented engineers and team leaders working across domains such as compiler optimizations, graph-level transformations, operator mapping, scheduling, and code generation. We are seeking a visionary and technically strong leader with passion for excellence and impact in one of the most fascinating areas of AI and deep learning.

Key Responsibilities:

Lead the design and implementation of innovative graph compilation flows for AI workloads, from high-level optimizations to hardware-specific backends. Build and guide a strong, innovative, and results-driven compiler team that thrives on solving complex technical challenges. Collaborate with hardware architecture, VLSI, and software framework teams worldwide to ensure seamless integration and maximum performance. Lead the end-to-end delivery of graph compiler components while meeting aggressive KPIs. Establish and execute group planning processes to ensure timely and high-quality delivery. Provide technical and managerial guidance to team leaders and engineers. Define and drive compiler optimization strategies for AI and deep learning workloads.

Lead and mentor a team of software engineers developing Sensing AI SDK. Architect and implement high-performance sensing SW components for AI, vision, Audio and voice optimized for vectorize SIMD execution. Collaborate with compiler and DevOps teams to ensure efficient development and deployment. Drive technical excellence through code reviews, design discussions, and continuous improvement. Own the SDK roadmap, planning, and delivery cycles. Engage with customers to enable successful pre-sale processes, support integration and gather feedback.