דרושים » תוכנה » Senior AI Test Architect

We are looking for an AI Test Architect joining E2E Verification group to profile Innovative large scale Distributed training on NVIDIA AI End-to-End solutions in a large scale supercomputing clusters. Provide insights on at-scale system design and tuning mechanisms for large-scale compute runs. You will work with the latest Accelerated Computing and Deep Learning software and hardware platforms, with researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions. You will interact with HPC, OS, Switch, HCA, CPU and GPU compute, and systems specialist to architect, develop and bring up large scale performance platforms.

What youll be doing:

Profiling, benchmarking, and analyzing deep learning models to identify areas for optimization and improvement in terms of performance, efficiency, and accuracy, with a strong emphasis on networking aspects.

Collaborating closely with data scientists, researchers, development, automation teams to design and implement scalable training pipelines and frameworks that demonstrate large scale high -performance networking capabilities.

Staying up-to-date with the latest advancements in deep learning algorithms, architectures, NVIDIA GPU technologies, and high-performance networking solutions.

Optimizing deep learning models for performance, memory usage, and power efficiency while maximizing high-performance networking features on NVIDIA supercomputers.

Providing insights and recommendations based on the analysis of large-scale training results, specifically focusing on networking bottlenecks and optimizations, to improve model outcomes and achieve business objectives.

Collaborating with hardware engineers to guide the development and integration of efficient networking solutions for deep learning, including exploring network architecture optimizations and bringing to bear technologies such as RDMA or InfiniBand.

We are looking for a Senior networking test engineer with strong system‑level debugging skills to join our End‑to‑End Verification team. You will work on cutting‑edge Ethernet‑based AI clusters, owning complex issues across hardware, system software and AI workloads. We are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

What youll be doing:

Design and review test and product requirements across the Ethernet / NIC / DPU / Switch portfolio, focusing on large‑scale AI cluster behavior.

Build and maintain realistic customer‑like testbeds, including heterogeneous hardware, OS / driver combinations and complex network fabrics.

Own end‑to‑end cluster troubleshooting: reproduce customer scenarios, triage across the stack and drive issues to root cause and fix.

Read and understand relevant source code to identify defects, validate fixes and improve logging and instrumentation.

Collaborate closely with development teams to debug NCCL, RoCE/RDMA and related networking components using logs, code inspection and targeted experiments.

Define tests and guide the automation team to implement robust suites that produce actionable logs, metrics and traces.

Run Regression, Performance, Functional and Scale testing, analyze results and provide clear, data‑driven reports to stakeholders.

Profile and benchmark deep learning training and inference workloads, correlating model‑level metrics with system and network telemetry to uncover bottlenecks.

We are looking for a Senior HPC and AI Cluster Administrator to join the Networking clusters solutions HPC/AI Infrastructure team. We are building supercomputers and AI clusters based on groundbreaking technologies. We are looking for a system administrator to be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing

You will work with the latest Accelerated computing and Deep Learning software and hardware platforms, and with many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions. You will interact with HPC, OS, GPU compute, and systems specialist to architect, develop and bring up large scale performance platforms. Does this sound like you? If so, we would love to hear from you!

What you will be doing:

Deploy, manage and maintain large scale HPC/AI clusters.

Managing Linux job/workload schedules and orchestration tools.

Support and maintain continuous integration and delivery pipelines.

Troubleshooting and fixing, bottom up from bare metal, operating system, software stack and application level.

Supporting Research & Development activities and engaging in POCs/POVs for future improvements.

We seek a highly motivated Network Performance Exploration Engineer to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for exploring and identifying critical network optimization opportunities across our entire hardware and software stack, analyzing how system-level changes impact application-level performance.

What Youll Be Doing:

Explore and validate end-to-end application performance, defining comprehensive test plans and critical metrics to identify optimization opportunities in both hardware and software.

Establish and maintain a comprehensive database of benchmark results, tracking performance across releases to drive data-informed decisions.

Conduct deep-dive analysis into communication libraries (like NCCL), system software, and hardware configurations to investigate performance characteristics, validate architectural theories, and identify bottlenecks.

Provide critical performance data to correlate and enhance simulation tools, ensuring our models accurately predict real-world hardware behavior.

Analyze application-level traffic patterns (e.g., LLMs) on our advanced networking fabrics to identify hardware and software optimization opportunities and tune system parameters.

Lead Proof-of-Concept (POC) projects to prototype and evaluate potential hardware and software optimizations and their impact on application performance.

The Networking Advanced Development Software team develops new groundbreaking technologies to enable new market shares for the company and tighten customer relationships. These are emerging technologies in networking and distributed computing for the booming AI factories and data centers. They span areas such as AI neural networks, Deep Learning, High Performance Computing (HPC), Storage, Cloud, SW Defined Network, Network Function Virtualization and more. We develop the solutions top-down, all the way from application behavioral analysis, to architecture definition and down to the implementation, using the world-leading our devices. The development traverses any needed component - application SW, middleware SW, OS kernel subsystems, device drivers, embedded SW (Firmware) and CUDA GPU. We collaborate with partners and key customers in the analysis processes and engage with open source communities introducing our leading features.

What youll be doing:

Design and implement solutions throughout all layers from high level application, OS and driver subsystem to firmware.

Work on impactful projects involving state-of-the-art high-performance computing hardware and software.

Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology.

Collaborate with our partners and customers.

We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:
Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.

We are looking for an outstanding Senior Technical instructor to join our Education Services team. In this role, you will provide advanced training on our data center, AI, and HPC platforms to customers and partners around the world. You will also contribute to developing training content, including presentation decks, hands-on manuals, and supporting materials. You will help engineers, architects, and operations teams build the skills needed to design, deploy, and operate our-powered AI data centers with confidence. As part of this, you will take part in the design of hands-on workshops and lab environments that simulate real systems and data center components, enabling learners to practice on realistic end-to-end scenarios.

What youll be doing:

Deliver in-person and remote technical training on our data center, AI, and HPC platforms for customers and partners, with up to 25% travel as needed.

Lead lab-based training sessions that walk learners through end-to-end workflows on our GPUs, DGX/GB200 systems, high-speed networking, and AI/HPC software stacks.

Collaborate with internal experts and content developers to build agendas, exercises, and demos that reflect real customer use cases and guidelines.

Serve as a subject-matter guide (SME) for a dedicated production team and learning developers. They build primary content. Partner with them on slideware, lab guides, videos, simulations, visual demos, and exercises. Ensure technical accuracy and realism.

Act as a technical ambassador for us in front of partner and customer audiences, answering inquiries, facilitating discussions, and guiding learners through fix and what-if scenarios.

We are looking for a Software QA Engineer with a strong background in Networking and Automation to join our InfiniBand (IB) and NVLINK (NVL) Switch QA team. Our team is responsible for qualifying software stack for our IB Switch, Router, Gateway and NVLINK systems, delivering world-class networking solutions. You will work at the heart of cutting-edge technology, validating software management features, designing topologies, developing automated test suites, and collaborating with engineering and product teams to ensure delivery of robust and scalable systems.

What youll be doing:
Design, develop, and execute manual and automated tests as part of software stack releases.
Define, build, and manage testbed topologies for functional, regression, and performance validation.
Analyze architectural designs and feature requirements for new networking capabilities.
Debug failures, identify root causes, and verify fixes delivered by development teams.
Schedule test runs, track testing progress, and generate test status reports with detailed defect documentation.
Write and maintain automation tests across multiple frameworks (Python, Perl), enhancing test efficiency and scalability.
Collaborate with cross-functional global teams including R&D, product marketing, and system verification.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced AI models such as GPT and DeepSeek. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:
Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
Research various of solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.
Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are currently seeking a hard-working Senior System and Hardware TimeSync Architect who flourishes with these types of challenges to join our Time Synchronization Architecture team.

In this role, you will be exposed to the newest technologies and will help define how our GPUs, CPUs, and networking devices use timing to power extraordinary products and applications. Specifically, you will focus on next-generation Radio Access Network (RAN) platforms for 5G and 6G, delivering innovative, scalable, and power-efficient TimeSync solutions. By working across hardware and software stacks, you will support sophisticated AI acceleration and drive industry-wide standardization. If you want to lead the industry and help us define the next generation of data center and telecommunications technology, this is where you belong.

What youll be doing:

Master our Time Synchronization Technology.

Define of hardware and system architectures.

Research and evaluate algorithms currently used in related applications.

Develop complex proof-of-concepts to demonstrate ideas.

Architect Time Synchronization hardware tailored to the requirements of next generation RAN workloads, including distributed, centralized, and small cell deployment scenarios.

Collaborate with software architects to define new features and robust SW-HW interfaces for diverse networking use cases.

Drive standardization and interoperability to support broad industry adoption.