דרושים » חומרה » Senior Hardware Test Engineer

The Chip Test Engineer plays a crucial role in designing, developing, and implementing automated test for IC chips and systems for Automotive industry.
The Test Engineer is responsible to define and develop tests, design test features, program test scripts, and analyze test results to ensure the quality and functionality of products.
The Test Engineer collaborates with cross-functional teams to troubleshoot issues, improve test processes, and support product development efforts.
Responsibilities:
Develop and implement test strategies, plans, and procedures for ATE systems to ensure comprehensive testing of ICs.
Design and develop test features, test programs, and test scripts for automated test environment (ATE) based on product specifications and requirements.
Collaborate with design engineers, product manager, production vendors and manufacturing teams to understand product functionality, performance requirements, and testability considerations.
Conduct feasibility studies and risk assessments to identify potential challenges and develop mitigation strategies for test development and implementation.
Develop test program based on code languages C++ , Java and Python.
Debug, troubleshoot, and resolve issues with ATE hardware, software, and test scripts to ensure reliable and accurate test results.
Analyze test data and results to identify trends, anomalies, and potential defects, and provide feedback to design and development teams for product improvement.
Develop and maintain documentation for test procedures, specifications, and configurations.
Collaborate with vendors and suppliers to evaluate and select ATE equipment, components, and software tools that meet project requirements and performance standards.
Stay abreast of industry trends, advancements in test technologies, and best practices in automated testing to drive continuous improvement in test processes and methodologies.

This role is separated from the QA team and is not a QA position!

Youll lead test engineers and robotic field operators in Israel, own the in-country tractor test fleet and sites (and client sites when required), support and coordinate with the R&D QA team and the US Testing Team, while closely coordinating with R&D Developing teams, Operations, and US counterparts to drive safe, efficient, and impactful testing.

Responsibilities - what youll be doing:

Own testing in Israel: Full accountability for planning, execution, reporting, and continuous improvement of all tractor testing activities.
Lead the team: Manage, mentor, and coach test engineers and robotic field operators; define roles, priorities, and growth paths.
Plan and prioritize: Build weekly, monthly, and quarterly test plans aligned with development phases and stakeholder needs.
Define methodologies & safety: Establish test methodologies, procedures, site protocols, and strict safety processes for field and lab operations.
Operate at all system layers: Run and evaluate the system end-to-end; perform Level A/B maintenance (software and hardware).
Execute diverse tests: New software versions, existing and new hardware, new features, and 3rd-party integrations.
Interface with stakeholders: Work closely with R&D groups, with significant coordination with the QA team. Also work with Operations and US teams; synchronize testing methods with the US testing team.
Backlog intake & triage: Review the task management platform daily; clarify scope, assets, dependencies, and acceptance criteria.
Author test plans: Produce complete plans with detailed scenarios, environments, compatibility definitions, resources, and schedules.
Data & documentation: Deliver daily debriefs (logs, recordings, datasets) and weekly status reports to internal teams and test clients.
Cross-site coordination: Run regular meetings with the US test team; manage a 10-hour time-zone difference and joint test phases.
Fleet & site management: Ensure readiness, uptime, and safe operations of the local tractor fleet, test sites, and client sites as needed.
Continuous improvement: Track metrics, analyze defects and root causes, and implement process/tooling improvements.

A problem isnt truly solved until its solved for all. Thats why our customers build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager at our company, youll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. Youll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.
As a Technical Program Manager for Silicon Development, you will use your technical and management experience to lead the development and execution of complex, multidisciplinary SoC projects. You will plan programs and manage their execution from early concept through development to tapeout and production. You will collaborate closely with architecture, design, verification, physical implementation and manufacturing teams throughout the SoC execution life-cycle. This includes making technical decisions for the chip designs and methodology, driving project schedules, identifying risks and communicating them to all stakeholders, and managing partner teams.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan, coordinate, and deliver custom silicon products.
Assess complexity and scope out the project, generate task lists, build an efficient and effective project timeline and work with the teams to make it reality.
Lead the creation of credible and data-driven schedules and milestones, track the progress, proactively identify potential future issues, and identify mitigations with the various team leaders.
Drive technical, budgetary, and schedule trade-off discussions with cross-functional teams, balancing what is needed with what is possible.
Manage project execution and issues as they arise through design, development, test, manufacturing, deployment and sustaining activities for silicon and hardware products.

We are seeking a Test Automation Team Leader to lead the Product Engineering Teams test automation efforts. In this role, you will guide a team of engineers in developing and maintaining automated test environments for hardware validation and production. You will combine strong technical expertise with leadership skills to define methodologies, ensure test reliability, and mentor team members while collaborating across hardware, software, and production groups.
Key Responsibilities
Lead and mentor a team of test automation engineers, providing technical guidance and career development.
Define and oversee the implementation of test automation methodologies for hardware validation and production.
Oversee the development of object-oriented Python test frameworks to support modular and reusable test automation.
Review hardware schematics and datasheets to support test planning and execution.
Collaborate with hardware engineers to define, implement, and stabilize tester-DUT setups creating stable, reliable and repeatable product test flow.
Drive SW-HW integration efforts, ensuring test environments are scalable, robust, and maintainable.
Coordinate with cross-functional teams to align test strategies with overall product engineering goals.

We are now looking for a Senior Security Validation Architect for Networking AI Platforms! NVIDIA is seeking an outstanding security architect with deep expertise in security validation and advanced testing methodologies to help design, build, and guide secure validation across our next-generation products. The candidate is expected to deliver highly innovative validation and verification solutions that lead to significant industry differentiation and help achieve the long-range goals of the Security organization. Leaders in this role will strengthen NVIDIAs Data Center and networking products against emerging threats while driving adoption of future-proof security validation technologies.

What youll be doing:

Defining and driving implementation and adoption of security validation strategies across NVIDIAs networking platforms security solutionsspanning Silicon, Firmware, and System levels.

Designing frameworks and automation flows to test and verify security functionality during product QA, large-scale manufacturing, and in-field operation.

Collaborating with architecture, design, and product engineering teams to ensure robust verification coverage for hardware roots of trust, secure boot, key provisioning, and cryptographic services.

Driving development of advanced validation and debugging tools capable of detecting complex security anomalies, misconfigurations, and behavioral deviations across systems.

Building and maintaining an end-to-end visibility architecture for security validation metrics, enabling continuous trust across the product lifecycle.

Our R&D organization is global, professional and strives for best practices and high efficiency. Our technology stack includes AWS (and also Azure), Kubernetes, Terraform, HELM, Kinesis, Relational DB (ClickHouse), Airflow, Elastic Cache for Redis, RDS (MySQL, PostgreSQL), Prometheus, Grafana, NodeJS, Go(lang), Python, React, GitLab CI/CD and more.

About the Role

We are looking for a Manual QA Engineer to join our growing R&D team. In this role, you will play a key part in ensuring the quality and performance of our innovative products, working closely with developers, product managers, and other QA engineers to support fast, reliable releases.

This is an exciting opportunity to work in a fast-paced, global environment, with advanced technologies and impactful challenges.

What Youll Do

Plan, create, and execute manual test cases based on product and technical requirements
Conduct functional, regression, UI/UX, and exploratory testing on web applications
Identify, document, and follow up on bugs using Jira and other tools
Collaborate with development and product teams to define testing scope and ensure release readiness
Support production issue investigations and validations
Help improve QA processes, documentation, and testing coverage
Participate in sprint planning and product spec reviews to ensure testability
Create the test plans and execute them alongside the Unit tests, Components test written by DEV and understand what to test according to the testing Pyramid.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-specific integrated circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, assisting in the hardware and lab bring up, and verification of our ASIC systems.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic Design Automation (EDA) tools, licensing, and job management in our company infrastructure.
Support emulation team members with debugging hardware, tooling, and project specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms, and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our company AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users , Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design for Test (DFT) Engineer, you will be responsible for defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design and verify the DFT logic and prepare for post silicon and co-work/debug with test engineers.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.

We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG), hierarchical DFT).
Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic Built-In Self Test, Test Access Point (TAP) controller, clock control block, and other DFT IP blocks.
Insert MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
Document DFT architecture, test sequences, and boot-up sequences associated with test pins.

As our global operation continues to expand, we are seeking a skilled and enthusiastic QA Manual Engineer to join our team. As a QA Engineer, you will play a crucial role in ensuring the quality and reliability of our products. The ideal candidate is self-motivated, detail-oriented, and possesses excellent organizational skills, as well as a strong willingness to learn and adapt to new technologies.

In this role, you will work with many different teams across the company. You will work closely with our product managers and developers, validating that our products meet the highest quality standards and effectively solve customer problems. You will also work closely with product designers, the support team, and more.

What You'll Do:

Perform comprehensive testing of new features to verify the requirements are met and long-term quality is upheld.
Develop and execute test plans, test cases, and test scripts to ensure the software meets quality standards.
Define core business flows that will serve as the backbone of the automated tests written by our automation developers.
Collaborate with the Product and R&D teams to investigate and troubleshoot issues, and provide usability feedback based on customer interactions.
Work closely with the support team to understand customer pain points, which will help inform your testing strategies.
Continuously stay up-to-date with the latest product features and improvements, ensuring that our QA processes are aligned with current developments.