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Were looking for a talented and driven Integration Team Lead to join our System Engineering group. In this role, youll lead the integration team, working closely with system engineers, V&V, and other R&D functions to bring cutting-edge technologies into reality.
Responsibilities
Lead and manage the integration team, including task planning, setting priorities and mentoring team members
Be the technical focal point for integration-related activities
Oversee system testing and manage the handover process from Integration to V&V
Lead system bring up activities
Responsible for troubleshooting efforts and resolving problems in a timely manner
Maintain a broad understanding of the entire system and stay up to date with the latest version
Lead by example, motivate, empower and develop team members to reach their full potential
Establish strong working relationships with System Engineering and V&V teams to ensure high-quality delivery
Collaborate closely with multiple cross-functional teams across the organization.

we are looking for best-in-class Senior VLSI integration Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .
Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.
Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks
Taking part in flows development and deployment.

Were looking for a talented Radar System Integration Engineer to join our innovative System Engineering group.
Responsibilities
Integrate multidisciplinary full radar system including HW Platform, ASIC, RFIC, SW, ALGO
Troubleshoot and debug our Radar, ASIC and FPGA platforms
Define, implement and execute acceptance tests plans, procedures, and reports
Define new features and HW requirements for full system optimization
Simulate and analyze mix signals system data
Validate system performance.

We seek a skilled System Qualification Engineer to join our R&D Hardware team and ensure the quality, reliability, and performance of Hardware projects.

You will lead system-level qualification, integration, and testing activities, working closely with hardware, software, and System teams to validate our products before deployment.

A day in the life and how youll make an impact:
Lead qualification, testing, and validation of multidisciplinary systems.
Define and execute test plans to ensure product performance and compliance.
Collaborate with hardware, software, and mechanical teams to resolve system-level issues.
Troubleshoot and investigate integration or performance problems in lab and field environments.
Document test results and provide clear feedback to development teams.
Work with subcontractors and suppliers to support qualification and testing tasks.
Travel internationally up to 25% of the time to support on-site testing and deployment.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.
In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.
Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks
Taking part in flows development and deployment.