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Location: Haifa and Hod Hasharon
Job Type: Full Time
We are looking for a server application and workload (Cloud, Internet, Enterprise) expert to analyse, simulate emerging workloads (Compute and AI) and develop HW and SW optimizations that will improve their PnP (power and performance).
Responsibilities:
Track and review emerging compute and AI workloads for Cloud, Internment and enterprise applications
Deploy and Simulate emerging workloads on our system simulation infrastructure
Analyze performance bottle necks and develop innovations that will improve their performance
Work with the SW and HW development team in order to incorporate these innovations into our products
Occasionally simulate and analyze performance issues reported by customers and come up with solutions.
Requirements:
PhD or MSc in computer science or area related to computer architecture, or equivalent research experience in industry
At least 10 years of relevant research experience in industry or Academia
Ability to provide innovation and global vision throughout the company
Experience analyzing performance of new application and root cause of performance bottlenecks
Candidates should have research experience in at least one of the following areas:
Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect- MUST.
Workload characterization and analytical model generation- MUST.
Parallel, High-Performance, and Distributed Computing with an emphasis on hardware-software characterization, optimization and innovation
Heterogeneous Architectures and Systems for Datacenters.
Expertise in the field of AI will be a big advantage Excellent communication, presentation and reporting skills Experience working with highly technical teams and communicating to non-technical partners.
Excellent oral and written English.
This position is open to all candidates.
 
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חברה חסויה
Location: Hod Hasharon and Haifa
Job Type: Full Time
We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools
Responsibilities:
Develop and analyze performance and power features in our cycle accurate pre-silicon model and improve the accuracy of the current Server system simulator
Design the architecture of the new generation system simulation platform that will be used to analyze performance of Server (Compute and AI) workloads and identify performance bottlenecks
Develop new technologies, methodologies and tools for simulation. Analysis and debug of applications and workload on Huawei servers
Propose and simulate optimizations and innovations on the HW and SW in order to improve server performance for given workloads
Distribute the simulation platform, train and support other teams in China and in Europe using the simulation platform, technology and methodology.
Requirements:
MSc or BSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 7 years of relevant research and development experience in industry and academia in the following areas:
Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
Workload characterization and analytical model generation
System Modelling and emulation of HW.
Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and global vision throughout the company
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners.
Excellent oral and written English.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work with internal system teams and the System-on-Chip (SoC) Architecture team to develop an understanding of the SoC, performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model SoC performance at different accuracy levels by supporting architectural explorations and decision-making. In addition, you will correlate performance projections with measured post-silicon data.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop simulators and architectural models of general-compute SoCs.
Collaborate with system architects, SoC and IP architects/designers, and software and application experts to understand current and future requirements.
Participate in architectural and design evaluation of SoC designs.
Perform pre-silicon performance simulation and correlate with post-silicon measurements.
Communicate analysis results qualitatively and quantitatively.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience with C++ and Python.
Experience with analysis of multi-core SoC workload performance.
Experience creating or integrating simulation models of multi-core SoC subsystems at different levels of abstraction (e.g., cycle-accurate and TLM).
Preferred qualifications:
Experience with systemC.
Experience with SoC cycles in SoC performance modeling and analysis.
Knowledge of caches, mesh fabric, coherency, memory controllers, DRAM, PCIe, CPU, or GPU.
Ability to read, debug, and modify RTL and work with design flow, tools, and verilog language.
This position is open to all candidates.
 
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05/06/2025
Location: Haifa
Job Type: Full Time
We are looking for an experienced engineer for the Nitro cards product team. Our products include the most advanced interfaces and technologies and widely used across our data centers as backbone for Nitro and other services. The candidate will serve as expert for Nitro HW power domain - ensuring best design, integration and operational health for power domain for our Nitro cards in our data centers.

As a member of a product team you will own complex system debugs involving HW, FW and SW components. You will deal with functional and integration aspects related to complex systems focusing on the power domain related to Nitro HW. You will be involved in architecture decisions, integrations, deployments and debugging related to complex systems while also providing remote and on-site support to our global colleagues.
You will also provide leadership by driving the teams around you to raise the bar and deliver higher quality product on behalf of our customers. This is a fast-paced, intellectually challenging position, and you will work with thought leaders in multiple areas of technology. You will set high standards for yourself and everyone you work with, and will be constantly looking for ways to improve the performance, quality, cost and reliability of products and services you own. We are changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities:
- Lead triage, debug and root cause analysis of Nitro HW Power domain related issues in our systems (card / system level).
- Enhancing the ability to trouble shot issues and driving for closure of in-fleet problems.
- Analyze customers` mode of work / requirements and provide resolutions accordingly.
- Co-work with Annapurna Labs monitoring team and other root cause teams to improve quality and reliability of products operation in the fleet.
- Provide Annapurna Labs Board, ASIC and system design, SW and testing development, QA and architecture teams information and requirements from customers fleet operation perspectives and represent the customer voice.
- Drive and maintain trainings, quality documentation and collateral in order to improve in-fleet operation.
- Design and define various tools and scripts to provide support to projects and customize it as per requirement.
- Willing to travel per need few times a year.
Requirements:
BASIC QUALIFICATIONS:
- B.Sc. in one of the following: Electrical / Computer Engineering, or a related field.
- 7+ years of experience in designing boards / systems involving power circuitry.
- High level of expertise in power circuitry design and integration.
- Basic skills in scripting: Python / Bash etc.
- Experience in driving cross team and cross disciplinary activities.

PREFERRED QUALIFICATIONS:
- 10+ years Design and Debug / Integration Experience in systems involving HW, FW and SW.
- Advanced programming skills.
- Computer architecture knowledge (design or architecture) for x86 / ARM.
- Experience with operating systems, boot loaders, networking, and remote debugging.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop and execute comprehensive validation plans for our company's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation and/or FPGA platforms.
Lead the debugging and resolution of complex silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience in silicon validation or a related field.
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.
Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (ZeBu Server, Palladium, Veloce), or simulation platforms.
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Familiarity with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Excellent communication skills, with the ability to convey technical concepts to audiences.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the DFT Senior Engineer, you will play a crucial role in DFT Architecture and DFT design, and support devices of extreme complexity to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality matrix throughout the project lifecycle, and providing sign-off DFT to tapeout.
The ML, Systems, & Cloud AI (MSCA) organization at our company's designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company's services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company's services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team.
Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Automatic Test Pattern Generation (ATPG) methods.
4 years of people management experience developing employees.
Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
Experience in leading DFT activities throughout an ASIC development flow.
Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in JTAG and iJTAG protocols and architectures.
Experience in post-silicon test or product engineering.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The ML, Systems & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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Location: Hod Hasharon and Haifa
Job Type: Full Time
Required Senior Memory Subsystem Architect
Job Description:
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
Requirements:
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Build C/C++ firmware running on embedded processors with limited memory footprints on the SoCs.
Develop tools to update and debug the firmware, enable emulation, chip bringup, and hardware debugging.
Play key roles in emulation, chip bring up, and SoC deployment, and contribute to all layers of the data center software stack to deploy SoCs to production.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience.
7 years of experience coding in C/C++.
Experience with embedded systems/firmware design.
Experience working with networking (e.g. RDMA) or packet processing and system design principles.
Preferred qualifications:
Experience with hardware design (e.g., computer architecture or chip design).
Experience with SoC cycles.
Ability to work with device level hardware and software, especially in a lab environment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8187425
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the System on a Chip (SoC)/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure and Application-specific integrated circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SoC level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
5 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or SystemVerilog
Experience with reasoning synthesis techniques to optimize RTL code, performance and power with low-power design techniques.
Experience with design sign-off and quality tools (e.g., Lint, CDC, etc.).
Experience in reasoning design and debug with Design Verification (DV).
Preferred qualifications:
Experience in coding languages like Python or Perl.
Knowledge of high performance and low power design techniques.
Knowledge of assertion-based formal verification.
Knowledge of System-on-a-Chip (SoC) architecture.
Knowledge of PCIe, UCIe, DDR, AXI or ARM processors.
This position is open to all candidates.
 
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8186844
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Product Engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing and mission-mode operation. You will work to support the machinery that goes into our data centers affecting our company users.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop and implement strategies for high volume manufacturing of SoC products, including troubleshooting, ATE test coverage optimization, DPPM reduction, Test cost reduction, power and performance assurance, and product data integration and correlation between system, ATE, and System Level Test (SLT).
Drive interactions with wafer fabs and OSATs, own and drive checkpoints for key quality metrics.
Drive volume ramp and mass production through test program releases, volume data analytics, lot disposition, extended test time reduction, yield improvement, and RMA handling.
Collaborate with cross-functional teams across the globe including ATE and SLT Test Engineering, Q&R, Packaging, Supplier Management and Operations to build, deploy, and maintain a high volume manufacturing screening solution.
Support setup and maintenance of test, diagnosis, and yield analysis infrastructure, including RMA support.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience in product engineering or test engineering.
Experience with product engineering, supply chain data analytics, diagnostics for High Volume Manufacturing, or NPI.
Experience with ATE and SLT.
Experience in statistical analysis (e.g., JMP), Yield Management Systems (e.g., Exensio, Yield Explorer, JMP), or Python for data analytics.
Preferred qualifications:
Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
12 years of experience in product engineering and test engineering.
This position is open to all candidates.
 
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