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Our technology has no boundaries! We are building the worlds most groundbreaking and state-of-the-art computing platforms for the world to use. Its because of our work that scientists, researchers, and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most fast-paced computer users in the world - scientists, designers, artists, and gamers.

Its not just technology though! It is our people, some of the brightest in the world, and our company's diverse culture makes us one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence, determination, and team, which guide us to be the best we can be. We are now looking for a motivated Chip Architect to use your creativity to work on the ConnectX network adapter with the highly inventive and knowledgeable team.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications).

Drive Architecture/Software/Hardware co-design and collaboration on features set.

Work on proof of concepts and advance development projects.

Perform research and analysis for current and future architectures.

Craft product design specifications.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

We are seeking a highly motivated Software Modeling Engineer to join our team, and to ramp the activity of simulation and modeling in the architecture group. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs.
As a modeling engineer in our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you'll be doing:

Develop from scratch the entire modeling environment and infrastructure with the architecture team.

Develop software-based switch architecture models.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

Lead bringup and debug of new switch configurations in simulation.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for an experienced, highly motivated software engineer to join our Chip Design Technologies team. As a member of this team, you will be exposed to the world of EDA software development. This field merges electrical and software engineering to create software tools and solutions used to expedite the design and validation of the next generation of product designs. In our company, these products are aimed at advanced data centers, and power AI revolution across the world.

What you'll be doing:

Leading the charge in developing software tools and solutions, crucial for creating cutting-edge design validation methodologies for us.

Enhancing and refining our suite of in-house tools, used in design validation flow.

Collaborating with designers, verification specialists to ensure your solutions seamlessly integrate into our design validation process.

We are looking for best-in-class Physical Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

Act as Partition/Unit level physical design technical leader and focal point.

With the slowdown in Moore's law, silicon power management and hardware power optimizations become a critical part of the development of silicon ASICs. We are positioning you for a key role to take on this challenge and become part of our team, so we can continue developing the best devices in the industry!

Our network horizontal power group is seeking for a highly-skilled, physical design engineer to explore, define and assimilate methods for optimizing our products' power with respect to performance and cost. In your role you'll be responsible to develop methodologies, improve tools and flows, driving power optimization and examine silicon power & performance. We are searching for a hard-working, highly motivated, engineer which has both excellent technical skills as well as outstanding personal skills.

What you will be doing:

Establish estimation and optimization techniques for RTL design and physical design teams.

Improve estimation quality and pre2post correlation.

Develop methodologies and flows across the organization for both pre and post-silicon analysis.

Improve RTL to gate level power aware flows and automation.

lead power execution teams with working methods and power model for various product lines.

We are looking for a Software QA Engineer to join our BlueField DPU testing team. This position will be part of the QA group which enables our products meet the industry leading benchmarks of efficiency and quality. The ideal candidate will engage in testing of DPU SW and DOCA SDK industry-leading features, be able to learn new features, execute manual and automated tests and engage in automation development.

What you'll be doing:

Review arch design and requirements for new features introduced in the DPU software and DOCA SDK.

Design, develop, and execute tests for the new features, as part of DPU software GA releases or update releases.

Report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by R&D team, raise if not fixed.

Automate newly added tests in the existing automation framework, add new capabilities and features to the framework.

Develop/Enhance Tools, applications, or processes to improve the quality and test efficiency.