לוח משרות דרושים מהנדס אלקטרוניקה במרכז

Electrical Engineer team leader For a Robotics global company -Central Israel Lead and mentor our Electronics and Embedded teams
Spearhead the design of our next-generation autonomous systems
Oversee the design and layout of PCBs for autonomous systems
Ensure that PCB designs meet stringent performance, reliability, and manufacturability standards
Guide the development and implementation of Embedded systems for control and communication in robotic devices
Optimize and troubleshoot Embedded systems to achieve peak performance and reliability

Were an exciting Deep Tech startup, backed by the largest VCs and founded by serial entrepreneurs. Our products provide high-performance computing capabilities that will improve the speed and efficiency of database operations. Were seeking an outstanding Senior SW Engineer to join our team and help us develop advanced algorithms that will be executed on our hardware accelerator. This is a rare opportunity to influence the future of data processing.

Job Description
Develop and optimize algorithms for database operations that can be executed on our hardware accelerator
Fly high with the SW, and dive in for a byte of the HW
Write high-performance code in Python and C++
Collaborate with hardware engineers to optimize software and hardware integration for maximum performance
Conduct research on state-of-the-art algorithms and techniques for data analytics and hardware acceleration
Develop and maintain software tools to support testing and validation of our products
Participate in code reviews and contribute to software design decisions

An exciting semiconductor startup is seeking an experienced Presto/Trino developer to lead the software development for running state-of-the-art analytics frameworks on a new type of hardware accelerators. This is a rare opportunity to influence the future of both processor architectures and analytics frameworks.

Job Description
Architect and implement a Presto/Trino connectors and plugins for a revolutionary hardware
accelerator SoC

Interact with the processor and compiler teams to introduce system optimizations
Provide technical guidance to a team of software engineers building software platforms for
large-scale data processing and real time analytics
Contribute to the data analytics open-source community of (e.g., Presto, Trino, Spark)

An exciting semiconductor startup is seeking an outstanding formal verification
engineer to develop a new type of massively parallel architecture.
This is a rare and exciting opportunity to join an evolving team and company,
allowing you to influence the future of both processor architectures and
database systems.

Job Description
We are looking for highly motivated engineers who love the challenge and the opportunity
of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

An exciting full-stack startup, backed by the largest VCs in Israel and founded by serial entrepreneurs together with academic experts, is seeking an outstanding SW Validation Engineer. This is a rare opportunity to join early and build new products and business model and make a dramatic impact on the core of future data processing.

Job Description
In this role, you will be responsible for implementing infrastructure for performance analysis, tuning, and debug of a new SOC product. As a member of our SW team, you will collaborate closely with other SW & HW Engineers to study, Dev ops to develop and get required environment, debug and improve the performance of our new cutting-edge SOC. Collaborate with our business unit and participate in the product design and implementation. Evaluate, implement, and integrate diverse tools and technologies among which: Databases, SPARK, PrestoSQL, Hardware simulators, etc.

Responsibilities
Collecting performance data for various workloads / benchmarks
Conducting detailed workload characterization
Building an automated performance analysis environment
Writing micro-benchmarks to understand performance characteristics of a SoC
Collect traces to feed the performance simulation model
Integrating performance pipeline metrics with internal dashboard.
Implement the backend of outbound facing tool.
Present the performance data in a concise manner

An exciting semiconductor startup is seeking an outstanding Firmware engineer. This is a rare opportunity to influence the future of both processor architectures and database systems.

Take a part in the design and brainstorming of new complex features. Develop, test, debug and optimize low-level firmware layer on our SOC. Collaborate with chip design, software, verification, and architecture teams to define and design new low-level firmware flow. Improve our team methodologies, and automated process.

An exciting semiconductor startup is seeking an outstanding lead architect to join the architecture and system engineering team and create and define a SoC and system architecture for a new type of SoC processing big data. The architect will be responsible for the hardware specifications and flow specifications of complicated modules in the chip and in the full system solution. The architect will work closely with the chip design, firmware and software teams.
This is a rare opportunity to influence future processor architectures.

Job Description
Definition and specification of subsystems in the SoC which includes multi-core massively parallel processor, accelerators, network on chip and networking blocks.
Breaking down the sub-system architecture into microarchitectural blocks, firmware, and SW components.
Understanding the system in which the SoC is integrated to and designing the SoC to perfectly fit into the datacentre system.

An exciting semiconductor startup is seeking an outstanding verification engineers to develop a new type of massively parallel architecture.

This is a rare and exciting opportunity to join an evolving team and company, allowing you to influence the future of both processor architectures and database systems.

Job Description
​​We are looking for highly motivated Engineers who love the challenge and the opportunity of a growing company. Join us and be a part of a small and dynamic team, which is revolutionizing the parallel processor architecture.

With the growing demand for traffic bandwidth in datacenters, efficient physical high-speed communication becomes a crucial part of the development of silicon ASCs that serve networking infrastructures. We are looking for a PHY (Physical Layer) Architect for our Architecture team. We are positioning you to a key role to face this challenge and become part of our team, so we can continue developing the best devices in the industry.

Our networking architecture group is seeking for a highly skilled, leading engineer to explore, and define the Physical layer of our products. As a lead engineer, you'll be responsible to define and drive features and have responsibility on the Physical layer architecture. The role will include definition of both the hardware circuitry and the firmware/software that is involved in operating the physical layer communication, with emphasis on the former. We are searching for hardworking, enthusiastic, engineer which has both highly technical skills as well as good personal skills, in order to be able to lead cross groups activities.

What you will be doing:

Lead projects across team, starting from processing requirements and definitions from customers and translating those into detailed technical specification for hardware architecture, system embedded software, user interface and high-level design.

Supervise the implementation of projects by team-leaders / developers / QA, participate in low level design reviews, QA test plans reviews, and keep track of changes and handle obstacles.

Define the architecture of implementing physical layer standards into our ASIC devices.

Involved in standard bodies activities and definition of next generation protocols.

Define features for the phy layer, to exploit interoperability between different generations of communication.

Be involved in product definition and the high-speed protocols that the company`s networking devices will support.

Work closely with multi-functional teams - design, backend, system, marketing, firmware, driver, etc. Provide architecture definitions and as a result converge on key design decisions.

Become focal point for our physical layer networking communication devices.

Provide our customers technical and engineering expertise in their ASIC design HW verification process, using our HAV Platforms and Solutions:
Analyze customers verification methodologies and targets, platform and Testbench solutions planning.
Drive and execute HAV products Evaluations on customers designs.
Support customers in deployment of the HAV products, from RTL code compilation and synthesis, towards SoC-level full functionality bring-up on the systems.
Hands-on bring-up of Emulation Testbenches, including interface protocol Transactors, memory models SpeedAdapters, C++ code, and automation scripts.
Regularly interact with customers as their first contact to address any quality issue or required improvements in our products and their collaterals.
Work internally with R&Ds to provide feedbacks on products, track development process and roadmaps.
Work internally with Sales team on accounts strategy and business growth opportunities.

This position will be part of the Engineering Department. We are looking for an experienced PCB designer.

Location:
Based at the RAD offices in Tel Aviv. Hybrid option twice/week.

Responsibilities:
Components library design.
PCB design, including PCB technology definition, and constraints definition. Support for PCB manufacturing and assembly.

looking for you to join our growing VLSI team.

developing the next Gen cutting edge Digital signal processor and looking for VLSI design team lead to drive innovative architecture to

reality, and will be the foundation to products to come.

As part of this position, you will lead a design team of experienced designers, and you will work on a full design flow from architecture

definition, through micro ARCH, Verilog writing and verification process up to timing closure and STA.