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18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced DFT Engineer to join an exceptional team of DFT experts to develop the next generation DFT technologies.

As a DFT engineer at the networking group, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

10+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Familiarity with backend flows.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design, Verification experience.

Experience in working with back-end on area, power and timing closures.

Experience with CDC flows and tools.

Experience with silicon testing.

Cad tool development experience.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8506727
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18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class STA (Static Timing analysis) Physical Design Engineers to join our outstanding Networking DFT team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:
DFT STA execution, from rtl driven constraints and definitions through DFT constraints quality assurance to STA sign-off.
Be part of a unique team of experts who have deep understanding in all aspects of pre and post silicon.
Be exposed and work on a variety of challenging designs, unique DFT solutions that require deep silicon implementation understanding.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part in flows development.
Requirements:
What we need to see:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise

Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Knowledge in DFT flows such as ATPG, Mbist, Ijtag.
Prior experience in DFT timing closures.
Knowledge in CDC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506726
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:
Work in a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.
Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.
Requirements:
What we need to see:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered
Experience in full and cluster-level verification is an advantage
Self-motivated, ability to work independently and drive tasks to completion
A great teammate with strong communication and interpersonal skills.

Ways to stand out from the crowd:
Knowledge in Specman, Verilog
Knowledge in Networking
Great interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506725
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18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
6+ years of relevant experience
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506724
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

be part of a unique FC team of experts who have deep understanding in all FC aspects, especially integration and STA.

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

Proven experience in RTL2GDS flows and methodologies.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8506719
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:
3+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.
Strong programming skills in scripting languages.
BSc. in Electrical Engineering or Computer engineering.
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.

Ways to stand out from the crowd:
Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.
Experience in Mentor TestKompress ATPG tool and retargeting flow.
Programming languages: TCL, PRL, Phyton & Unix shell scripts.
Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8506716
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:

5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.

Strong programming skills in scripting languages.

BSc. in Electrical Engineering or Computer engineering.

Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.


Ways to stand out from the crowd:

Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.

Experience in Mentor TestKompress ATPG tool and retargeting flow.

Programming languages: TCL, PRL, Phyton & Unix shell scripts.

Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506714
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: More than one
Job Type: Full Time
We are looking for an HPC and AI Data Center Engineer to join the networking cloud solutions HPC/AI Infrastructure team. We are focused on building supercomputers and HPC clusters based on groundbreaking technologies. We are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing. Take part of building large-scale compute and Deep Learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.

What you will be doing:

Plan and build complex cluster and supercomputers in various of data center and labs.

Rack stack and cable management to ensure efficient use of space and easy maintenance.

Ensure data centers and labs power and cooling efficiency while optimizing rack space utilization.

Data centers and labs daily operation and support.

Installations for variety of infrastructure and solutions - Cloud, VMs, Storage, Network, HPC and AI.

Perform troubleshooting - network, optic cabling, bare metal, operating system.

Support Research & Development activities.
Requirements:
What we need to see:

MCSE or MCITP/CCNA certification.

3+ years of experience as lab manager.

Experience in supporting large and complex data centers.

Proven hands-on experience in Linux troubleshooting with good problem identification, resolution and solving skills.

In depth knowledge in Linux & Windows Core Services: DHCP, DNS, NIS, AD, etc.

Team Work, Service oriented, organized.

Ways to stand out from the crowd:

Scripting experience in Bash and/or Python.

Experience with configuration managements tools known in the community (e.g. Ansible, puppet).

CI & Known Job schedulers tools (e.g. Jenkins, SLURM).

Virtualization: KVM / VMware / Hyper-V.

Experience with L2 & L3 network protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506713
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a passionate Senior Software Engineer to join our Chip Design CAD team. In this role, you will contribute and work on the interesting junction of electrical and software engineering, when developing SW tools and solutions used to design the next generation Smart Adapters, Switches and GPUs for the advanced data centers across the world.

What you'll be doing:
Develop innovative SW solutions.
Take part in defining methodologies affecting design and verification engineers day to day work.
Improve existing tools, which are used in-house by electrical engineers for designing the next generation leading AI chips, SoCs and Switches.
Collaborate with designers, verification specialists and architects to accomplish your tasks.
Requirements:
What we need to see:
Computer Science degree with excellent grades.
5+ years of practical experience.
Motivated, responsive, and keen on process improvement.
Strong analytical, debugging and problem-solving skills.
Strong programming skills.

Ways to stand out from the crowd:
Experience in DA / CAD team.
Knowledge in FE/BE chip design / RTL / System Verilog / dynamic verification.
Strong cpp/python programming skills.
Working in AI driven environment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506710
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8506703
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מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a versatile Senior Software Engineer to join our DPU Platform team. This is an opportunity to make a significant impact in a technology-driven company that powers the worlds most advanced data centers. You will use your expertise in low-level embedded Linux software and boot flows to work with global development teams, solving the complex challenges involved in delivering high-power computing platforms.

What you'll be doing:

Designing and developing low-level system software with a primary focus on bootloaders (ATF, UEFI), firmware, and hardware initialization.

Working together with hardware and design teams to drive SoC bring-up and platform enablement.

Solving complex challenges related to boot sequences, system optimization, and hardware resource management.

Supporting various internal and customer DPU projects alongside our global teams.

Taking part in all stages of the product lifecycle, with a focus on high software quality and stability.

Collaborating within a global software environment to have a broad impact across the company.
Requirements:
What we need to see:

Bachelors degree in Computer Science/Engineering or equivalent practical experience.

5+ years of experience in embedded Linux software development (C is a must, C++ advantage).

Deep experience with Bootloader development and board support packages (BSP).

Strong understanding of the low-level software stack and hardware-software interaction, specifically regarding pre-OS environments.

Deep knowledge of processor architecture, including CPU, cache coherency, and hardware accelerators.

Solid engineering skills in design, technical investigation, and Agile processes.

Great communication skills, both written and oral.

Experience with development tools like git, gcc, make, bitbake, jenkins, etc.

Ways to stand out from the crowd:

Hands-on experience with ARMv8, ATF (ARM Trusted Firmware), and UEFI standards.

Background in developing secure boot flows or trusted computing environments.

Experience with hardware debuggers (JTAG) and low-level board analysis.

Background in developing security solutions or key management.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8506701
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מה השם שלך?
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a passionate Software Engineer to join our Simulation development team. Our team is growing, and we are looking for hardworking and experienced engineers to take part in building advanced networking simulation solutions. You will be part of a team developing next generation Switch simulation, works closely with other SW R&D teams and SW Architects.

What you will be doing:

Design and develop advanced features simulating our world class NICs and Switches.

Develop solutions using advanced virtualization technology.

Write clean, efficient and maintainable code.

Collaborate with team members, SW R&D, Architects, Chip Design and FW.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Computer Science / Software Engineering.

2+ years of experience.

Proficient knowledge and experience in C.

Strong design, coding, analytical, debugging and problem-solving skills.

Full ownership & end-to-end responsibility.

Excellent social and written communication skills.

Ways To Stand Out From The Crowd:

Can do attitude, independency and agility.

Ability to quickly adapt to new technology and go deep into new areas.

Understanding of Networking Protocols - Ethernet, InfiniBand is an advantage.

Knowledge of Virtualization, especially with KVM/QEMU is an advantage.

Knowledge of Linux/Windows kernel and drivers development is an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8506695
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: More than one
Job Type: Full Time
We are looking for a passionate, modern software engineer or junior architect early in their career. The role involves developing and prototyping new scalable training and inference advancements using our Spectrum-X AI fabric.

This role offers a rare opportunity to work on innovative AI and networking technologies, building prototypes that influence the development of large-scale AI systems. You will help improve AI application-network interaction by refining communication, crafting congestion control, contributing to NIC and switch capabilities, and enhancing AI factory performance at scale.


What youll be doing:

Prototype end-to-end solutions to improve distributed training and disaggregated inference performance.

Analyze and optimize communication flows across application, transport, and network layers.

Develop system software spanning communication libraries, drivers, and firmware integrations.

Collaborate with hardware, firmware, and SDK teams to co-design network features.

Validate and integrate prototypes into our AI infrastructure and products.
Requirements:
What we need to see:

Bachelor's or Master's Degree in Computer Science or Electrical Engineering

0-2 years of experience in relevant fields.

Programming knowledge in C/C++

Ability to work closely with architects and R&D teams.

Passion to learn and innovate independently.


Ways to stand out from the crowd:

Demonstrated innovation and leadership turning prototypes into impactful product features.

Understanding of Networking Protocols - Ethernet, InfiniBand is an advantage.

Ability to quickly adapt to new technology and go deep into new areas.

Contributions to open-source projects, academic papers, or performance benchmarking tools.

Background in AI factory architectures, distributed inference, or network telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8506688
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate, or equivalent experience.

2+ years of experience in RTL verification.

Self-motivated, ability to work independently and drive tasks to completion.

A team player with good communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Background in Networking.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8506685
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.

What you'll be doing:

Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.

Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.

Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.

Balance innovation with hands-on engagement in daily DV issues - keeping a strong connection to real-world challenges and support needs.

Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering (or related field).

5+ years of experience in Design Verification/Chip Design, with a deep understanding of simulation, testbenches, regression infrastructure, and debug.

Proven ability to identify inefficiencies or recurring issues in DV workflows and develop automation scripts or tools to streamline processes and improve efficiency.

Strong analytical thinking and problem-solving skills.

Proficiency in Python and Linux.

Excellent communication and collaboration skills - comfortable working across engineering teams.

Ways to stand out from the crowd:

Experience with contemporary DV methodologies, such as intelligent test planning or advanced debug workflows (e.g., automated log parsing, waveform analysis, or triage tooling).

Familiarity with recent industry trends in design verification, including AI-assisted debugging, smart triage, or LLM-based tools.

Proven ability to craft and deliver custom automation flows that scale to large regressions or complex simulation environments.

Hands-on contribution to DV infrastructure development within CAD/DA teams or large SoC projects.

Comfort working across teams, collecting feedback, and turning it into practical, adopted tooling.
This position is open to all candidates.
 
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8506661
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