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Location: Caesarea
DFT Intern - ASIC Student - Israel - ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Who We Are
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.
The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.
What You'll Do
Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.
Requirements:
Minimum Qualifications
B.Sc or M.Sc Electrical/Computer Engineer student from leading Israeli Universities with average grades above 85.
Team players who enjoy big challenges.
People who can quickly ramp on multiple, interdisciplinary domains.
The position is suitable for students finishing their second or third year.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8659345
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Location: Caesarea
Job Type: Full Time and Hybrid work
Required PHY Post Silicon Validation Engineer
Job Description
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
You'll be part of our Group driving our game changing next generation network devices - Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!
Requirements:
Minimum Requirements:
B.Sc/ M.Sc in Electrical engineer / Computer Science
Experience with C++/C#, Python
Knowledge in post-silicon validation or automation for networking systems specifically for DSP-based silicon systems, including debugging, validation, and optimization of DSP architectures.
Preferred Qualifications:
Knowledge in communication and signal processing
Knowledge in Linux, Git, Data Bases
Knowledge in development of GUI
experience with Jenkins Devops environment
System orientation with multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8659307
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time and Hybrid work
Required PHY System
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Requirements:
Minimum Qualifications:
Education: B.Sc/M.Sc in Electrical Engineering or Computer Science from a top university.
3+ years of relevant experience required
System Orientation: Strong multi-disciplinary approach with multitasking capabilities.
Major Advantage: Specialization in Communication and Signal Processing.
Experience: Hands-on experience with lab work is advantageous.
Technical Skills: Proficiency in C++, Python, and Matlab is a plus.
Preferred Qualifications:
Varies based on the team and business needs
Preferred Qualifications are desired education E
Experience, and skills that are in addition to Minimum Qualifications.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8659299
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time and Hybrid work
Required Performance Architect
Job Description
What You'll Do
Join our Silicon One architecture team, the core of silicon development. Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.
Who You'll Work With
You will be part of our Silicon One architecture team, which is central to our ASIC group.
Our team, which operates with a startup mentality within a stable and leading corporation, drives the development of next-generation networking devices-Silicon One.
Our design center is unique, hosting all silicon hardware and software development disciplines at one site. We are revolutionizing the industry by building a new internet for AI networks and the 5G era, with a unified, programmable silicon architecture that will underpin all of our future routing and switching products.
Our devices are engineered to be adaptable across service providers and web-scale markets, designed for both fixed and modular platforms. They deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. Silicon One is set to be a transformative technology for decades to come.
Requirements:
Minimum Requirements
Software Development Skills: Proficiency in C++ and Python.
Research Skills: Experience researching networking solutions.
Self-Learning Ability: Capability to quickly grasp new concepts and technologies from papers and specifications.
Presentation Skills: Effective in communicating and presenting complex technical concepts.
Curiosity & Innovation: A passion for innovation, with strong analytical skills and meticulous attention to detail.
Team Player: Proven ability to collaborate and contribute to team goals.
Technical Documentation: Strong writing skills for creating technical documents.
Preferred/Advantageous Qualifications
Versatility: Adaptable to diverse tasks within the networking architecture domain.
Network Modeling Experience: Familiarity with tools like ns-3 or OMNeT++.
AI Knowledge: Familiarity with AI concepts.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8659232
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
Required Senior Electrical Post Silicon Validation- Silicon One
Job Description
Meet the Team
We are a dynamic group of engineers dedicated to pushing the boundaries of technology. Our mission is to validate and drive the performance of Silicon One products, ensuring they meet the highest standards of quality and reliability.
Operating at the forefront of technology, we work with latest, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, applying our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us, and be a part of a team where professionalism meets impact!
Your Impact
Drive the resolution of complex silicon performance and characterization issues through deep, multi-functional collaboration with architecture, design, and software teams. Leverage these technical insights to provide critical feedback that directly influences the design, debuggability, and architectural specifications of future silicon components
Key Responsibilities:
Lead the Electrical Post Silicon Validation efforts for Silicon One products, focusing on high-speed and power-intensive devices. Collaborate with multi-functional teams to drive the silicon validation process, from architecture through to physical design and DFT. Analyze and interpret characterization data to guide design improvements and ensure product excellence. Develop and execute test plans to validate silicon performance and reliability against stringent specifications. Troubleshoot and resolve issues related to silicon performance and characterization.
Why Join Us:
Be part of team at the forefront of silicon technology, working on the most advanced products in the market. Work closely with some of the best engineers in the industry, driving innovation and excellence in silicon characterization. We are a fast growing team that values talent and provides ample opportunities for professional development and career advancement.
Requirements:
Minimum Qualifications
B.Sc. in Electrical or Computer Engineering/ equivalent
6+ years of experience in hardware System Debug and Electrical Characterization.
Proficiency with high-speed scopes, VNA, TDR, and phase noise analyzers.
ASIC bring-up on EVBs, specifically focusing on SerDes and high-speed clock/voltage domains.
Experience developing validation plans and automation scripts in Python.
Preferred Qualifications
Ability to root-cause issues that jump between the silicon, the package, and the PCB.
Deep understanding of signal and power integrity (jitter, supply noise, and channel design).
Experience collaborating with Design and Software teams to influence future "Design for Debug" features.
Background in using validation data to drive improvements in production flow and chip yield.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8659219
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time
We are excited to announce that the Silicon One team is undergoing rapid growth, and we are looking for a Senior C++ Software Developer.
Meet the Team
Join the Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Our silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed.
Requirements:
Minimum Qualifications
B.Sc or higher degree in Computer Science or a related field
5+ years of working or academic experience in Software Development
3+ years of experience in C++ or Embedded Development or Knowledge of ASIC design and familiarity with hardware development processes
Preferred Qualifications
Experience in CPP and Python
Ability to quickly ramp on multiple, interdisciplinary domains
Love for solving complex problems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8658288
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Required PHY Firmware Technical Leader
Meet the Team
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
8+ years of relevant experience in system and firmware.
Strong system-oriented mindset with a multi-disciplinary approach
Ability to work on complex problems while multitasking across domains
Preferred Qualifications:
Experience with C++, Python.
Familiarity with processor architecture
Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
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8658284
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