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Required Senior Silicon Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

For our site in Haifa, we are looking for a System Engineer for the development of advanced Helmet-Mounted Systems for pilots
Join us in developing innovative and mission-critical systems integrated into some of the most advanced combat platforms in the world. In this role, you will lead the development and integration of multidisciplinary systems, work with cutting-edge technologies, and contribute to operational solutions for pilots and ground forces. If you are looking for a meaningful technological challenge in a dynamic environment with broad interfaces and real system-level impact - your place is with us
In this role you will
Lead the development, integration, and implementation of advanced head systems for pilots and ground forces
Define system requirements and perform engineering analysis
Design system architecture and adapt technological solutions
Manage system integration and end-to-end testing activities
Support transfer to production and operational implementation processes
Work closely with development teams, customers, and suppliers in Israel and abroad
Provide technical leadership for complex multidisciplinary projects and collaborate with multiple interfaces.

Required Senior SoC Power Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our Platforms Infrastructure Engineering team designs and builds the
hardware and software technologies that power all of our services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of users.
Responsibilities
Develop methodology of SoC roll up of power reduction, projection, configuration, test plan and tools.
Work intact with Architecture, Frontend and Backend teams driving power reduction features (both logic and circuit).
Work with power delivery and packaging teams on simulations and scenario definitions.
Work with Architecture and design verification (DV) to define power scenarios and tests, debug, and integrate into the flow. Track whether power goals are met throughout execution.
Lead the power of a project. Own project priorities, and allocation of technical resources within the project, informing and escalating appropriately when external factors impact execution.

Required Senior Verification Engineer, Digital Signal Processing, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you own the verification strategy for high-speed Physical Layer (PHY). You aren't just looking for RTL bugs, you are looking for system-level failures. You will lead the effort to verify how the digital DSP interacts with the analog front-end.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Lead the verification strategy for high-speed PHYs (112G/224G), defining the test plan for top-level integration and mixed-signal boundaries.
Architect and implement mixed-signal verification flows using Real Number Modeling (RNM) or SystemVerilog-AMS to verify the interaction between Analog Front Ends (AFE) and digital DSP.
Design specialized testbenches to verify the stability, convergence time, and tracking capabilities of adaptive algorithms (e.g., LMS, Zero-Forcing) across Process, Voltage, Temperature (PVT) corners.
Develop tests that simulate real-world data center conditions, including link bring-up, auto-negotiation, and error-recovery protocols.
Act as the primary verification interface for the Signal integrity and Power Integrity (SI/PI) and Analog teams, ensuring that physical channel impairments (loss, crosstalk, reflections) are accurately reflected in the Design Verification (DV) environment.

We are looking for a Logic Design Engineer to join the ride as we spearhead the next revolution in electronics!.

Our Logic Design team builds the on-chip monitoring IP at the heart of our product - digital blocks that ship inside some of the most advanced chips in the industry. Were growing the team and looking for a Logic Design Engineer to take ownership of that logic, working alongside circuit, verification, physical design, EDA, and AE engineers. A strong fit if you enjoy hard digital design problems in a collaborative, technically demanding environment.

Responsibilities
Define and implement digital logic micro-architecture - in plain English, diagrams, and SystemVerilog.
Verify design quality against industry standards using static analysis tools (Lint, CDC, RDC).
Work with Circuit Engineers to turn low-level circuit designs into the well-behaved, insightful agents at the core of the proteanTecs solution.
Work with Verification Engineers to simulate and debug the digital logic.
Work with Physical Design Engineers to ensure correct implementation of our special circuits.

Key job responsibilities
* Design and implement advanced Design-for-Test (DFT) architectures for complex semiconductor platforms.
* Develop high-quality test and debug patterns ensuring robust performance.
* Conduct comprehensive static timing analysis across multiple DFT modes.
* Verify intricate DFT logic and components with precision and creativity.
* Support silicon bring-up and device diagnostic processes.

Your day will be filled with complex problem-solving and collaborative innovation. You'll work alongside world-class DFT engineers in a dynamic environment, developing semiconductor technologies that support global cloud infrastructure. Our team thrives on creativity, technical excellence, and continuous learning.

We are looking for talented Software Development Engineers to join our teams in Tel Aviv or Haifa and work on low-level software development. You will be building the foundational software layers that sit closest to the hardware - enabling high performance, reliability, and efficiency for AWS services at an unprecedented scale.

This is an opportunity to work in a deeply technical environment where your code runs on custom-designed silicon, directly impacting the performance and cost of cloud infrastructure used by millions of customers worldwide.

Design, develop, and optimize low-level software including device drivers, firmware, and hardware abstraction layers.

Collaborate closely with hardware design teams to define hardware-software interfaces and bring-up new silicon.

Write performance-critical systems software in C/C++ that operates under strict latency and resource constraints.

Debug complex hardware-software interactions.

Contribute to system architecture decisions and define software design patterns for next-gen chip features.

Develop and maintain automated test frameworks to validate functionality and performance at scale.

Participate in code reviews and drive engineering best practices within the team.

We are looking for Software Automation Engineer to help us develop a semiconductor platform based on a revolutionary architecture.

Take part in the development of products within a disruptive system architecture. Youll have the opportunity to work in a dynamic, open, fast-paced environment, developing the technologies that power the worlds largest cloud provider. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.

Key job responsibilities
As Software Automation Engineer, you'll be responsible for creating ML (Machine learning) and HPC (High performance computing) automation and tools, create CI/CD flows and implement effective dashboards with high scale.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written.
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack.
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality.
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development.

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
* Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

About The Position Imagry is looking for a Technical Project Manager who will be responsible for managing our company's ongoing bus projects, from the first encounter with the potential client until integration and on-site delivery. The position works closely with both the development and delivery teams to ensure that all project requirements, deadlines, and schedules are on track. Responsibilities:
* Lead projects from the RFI/RFQ phase, SOW response through the hands-on field integration and delivery, identifying schedules, scopes, budget estimates, and project implementation plans, including risk mitigation
* Coordinate with cross discipline team members to make sure that all parties are on track with project requirements, schedules, and deadlines
* Maintain continuous communication with customers in Israel & abroad (Europe, US, Japan)
* Meet with project team members to identify and resolve issues
* Prepare status reports by gathering, analyzing, and summarizing relevant information
* Manage change requests to ensure that all parties are informed of the impact on schedule and budget
* Lead the development of user manuals, training materials, and other technical documents as needed to enable successful implementation

We are looking for exceptional software engineers to help develop the next generation chips based on a revolutionary architecture.
In this job you will design and develop software for functional and performance validation.

In this role you will develop system level software, targeting chip architecture, functional correctness and performance, running on various platforms and validating chip functionality.

We are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.
Take part in the development of state-of-the-art products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the world's largest cloud provider, in a dynamic, open, and fast-paced environment.

We are looking for talented engineers to join our Chip Design team, working on the Graviton product line. Our chip design team is in charge of defining the product's features and working on their architecture and development. Our team members collaborate with multiple teams from different disciplines such as product definition, pre and post silicon validation, physical design, software and others contributing to a full cycle of chip development from idea to mass production. Your design will be integrated into the Graviton products, an important part of the AWS data centers worldwide. This is an opportunity to have a large-scale impact.

Key job responsibilities
Own a domain or sub-domain within an SoC - Take full responsibility for its entire lifecycle: Architecture and micro-architecture definition Writing RTL code in Verilog. Supporting the Verification and Emulation teams with test planning, debug, and results review Ensuring the final chip meets quality and reliability standards Collaborating with cross-functional teams - Partner with Product Definition, Verification, Emulation, Software, and Silicon Integration teams to deliver cohesive solutions.

We are looking for engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle.

As a CPU Verification Engineer on the Graviton team, you will be responsible for verifying the correctness, performance, and robustness of our next-generation ARM CPU cores and their surrounding subsystems. You'll work at the intersection of micro-architecture, system architecture, and software - ensuring our CPUs meet the highest quality bar before they reach silicon.