דרושים » הנדסה » Experienced Logic Design Engineer

The company's EyeC VLSI team specializes in designing advanced radar system chips for ADAS (Advanced Driver Assistance Systems) and autonomous vehicles. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
Design ownership on major blocks/clusters from definition to implementation phase.
Participate in various ASIC activities and flow definition which includes CDC, DFT, Lint.
Design micro-architecture of custom blocks.

Which team will you join? our company EyeC VLSI team - a group designing the chips for Radar systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
You will take a central hands-on role in Design Verification.
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan .
Execute coverage implementation.
Be part of external IP verification and Internal custom IP.
Be part of System definition and top-level activity.
Take part in Silicon bring-up.

Which department will you join? our company's VLSI team - a group designing the EyeQ chips for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering. Each Physical Design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges Were looking for a Backend Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

Which department will you join? our company's VLSI team - a group designing the EyeQ chips for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering. Each Physical Design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & RTL modifications to achieve converges Were looking for a Physical Design Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

The company's EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer. This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more)
Develop all the necessary RTL for the different modules
Verify and Validate your design in GLS
Develop ATPG patterns to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss
Support production activities and Si debug.

The RFIC/Analog design groups in our company's Radar organization is responsible for developing the cutting edge Transceivers in mmW frequencies for the best Imaging Radar technology. The design process includes the entire process from specs to productization. To support these challenging processes, we need a skilled CAD team that will work with the design teams on all design aspects and flows from design environment setups, through design tools implementations and support and to chip level verifications and validation enablement. We're looking for an Experienced CAD or Design Automation Engineer to develop our company's RF/Analog design tools/flows and automation flows for the next-generation Imaging Radar chips.
What will your job look like:
Build and support RF/analog design environments
Implement, develop, and maintain design flows, tools and scripts.
Evaluate and explore new automation technologies and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution, in the most optimal use, based on design needs
Effectively communicate and support a large number of designers, providing high-quality tools and flows, documentation, and presentations.

our company provides modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. As a Senior HW System Architect, your role will be to work closely with our OEM partners and realize a successful integration of the ADAS to self-driving technology in these platforms
What will your job look like?
Lead end-to-end life cycle of the System architecture - from analyzing OEMs (customers) technical requirements to HW architecture definition, development and verification to ensure integration of our company's products into the vehicle platform.
Work in close collaboration with various groups including algo, HW design, verification, SW architect, Mechanics, and simulations.
Provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
Responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
Provide practical system architecture definition to board designers and SW/algo by managing system external Interconnects and internal interfaces, SoC, MCU, definitions and optimization (based on OEMs requirements and other constraints).

mPrest is seeking a Lead Systems Engineer to drive the development of complex multidisciplinary projects from concept to deployment. The role involves system-level design, integration of mechanical and electrical components, coordination between engineering teams, and managing multiple parallel tasks in a dynamic environment.

Responsibilities:
Lead system engineering activities for complex, multidisciplinary defense projects
* Define system architecture, requirements, and interfaces across mechanical, electrical, and software domains
* Prepare and maintain system specifications, requirement documents, and test plans
* Collaborate with internal teams, subcontractors, and customers
* Manage risk assessments and project trade-offs
* Oversee and coordinate system integration and validation
* Participate in design reviews and lead system-level engineering discussions

As a Quality and Reliability (Q&R) Engineer, you will lead the qualification and long-term reliability of advanced System-on-Chip (SoC) semiconductor products for automotive applications. Youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
What will your job look like:
Define and manage Quality and Reliability specifications, simulations, and qualification plans for SoC die and package.
Plan and execute automotive-grade qualifications per standards such as AEC-Q100, JEDEC JESD22, and IATF 16949.
Design and implement die-level and package-level stress tests.
Select and prepare electrical, environmental, and mechanical test platforms for reliability testing.
Define requirements for Pre-Si Q&R (e.g. ESD, LU, EM, IR drop), Design-for-Test (DFT), electrical characterization, and Post-Si Q&R testing of digital, mixed-signal and RF SoCs.
Collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (OSATs).
Lead failure analysis, reliability modeling, and corrective action processes (e.g., 8D, FMEA, FMEDA).
Document and certify automotive standards compliance, including PPAP/APQP deliverables.

Join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF System-on-Chip (SoC) products. Youll collaborate with internal teams and external OSATs to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
What will your job look like:
Define and specify advanced package architectures for digital SoCs and RF ICs in automotive applications.
Perform substrate design for flip-chip BGA (FC-BGA) packages, including stack-up, routing, and ball-out optimizations.
Evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
Collaborate with OSATs to define and validate assembly materials and process flows.
Work closely with internal teams such as Backend, SIPI, Product Engineering, and Quality & Reliability to ensure seamless integration.
Monitor yield, quality, and manufacturability across package development and production stages.
Support DFM reviews and ensure compliance with automotive standards and customer requirements.