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Location: Jerusalem
Job Type: Full Time
As a Quality and Reliability (Q&R) Engineer, you will lead the qualification and long-term reliability of advanced System-on-Chip (SoC) semiconductor products for automotive applications. Youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
What will your job look like:
Define and manage Quality and Reliability specifications, simulations, and qualification plans for SoC die and package.
Plan and execute automotive-grade qualifications per standards such as AEC-Q100, JEDEC JESD22, and IATF 16949.
Design and implement die-level and package-level stress tests.
Select and prepare electrical, environmental, and mechanical test platforms for reliability testing.
Define requirements for Pre-Si Q&R (e.g. ESD, LU, EM, IR drop), Design-for-Test (DFT), electrical characterization, and Post-Si Q&R testing of digital, mixed-signal and RF SoCs.
Collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (OSATs).
Lead failure analysis, reliability modeling, and corrective action processes (e.g., 8D, FMEA, FMEDA).
Document and certify automotive standards compliance, including PPAP/APQP deliverables.
Requirements:
BSc/MSc in Electrical Engineering, Physics, or related field.
5+ years of experience in semiconductor Q&R, preferably with SoCs, ASICs, VLSI, or RF ICs.
Strong knowledge of semiconductor physics, packaging technologies, materials and reliability mechanisms.
Hands-on experience with Q&R test design and environmental stress testing.
Deep understanding of failure prediction models, reliability simulations, and statistical analysis.
High proficiency in English, including strong verbal, reading, and writing skills.
Familiarity with RF reliability concerns advantage.
Expertise in automotive Q&R standards, including AEC-Q100, IATF 16949, and JEDEC/ISO/IEEE protocols -advantage.
Experience with advanced packaging Q&R (e.g., WLCSP, FCBGA) -advantage.
Exposure to radar or ADAS/AV automotive systems Q&R advantage.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
You will also be responsible for performance analysis for a networking stack.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customes, Cloud customers and the billions of people who use our companyservices around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Implement designs in SystemVerilog.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Master's or PhD degree in Electrical Engineering, Computer Engineering or Computer Science.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking like: RDMA or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience with Mastery of TCP, IP, Ethernet, PCIE, and DRAM, and familiarity with Network on Chip (NoC) principles and protocols (e.g., AXI, ACE, and CHI).
Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
Ability to adeptly estimate performance through analysis, modeling, and network simulation, and drive performance test plans.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Location: More than one
Job Type: Full Time
our company SOC Architecture team is looking for a Senior Data Scientists with SW development skills and HW-System architecture experience. Do you want to be part of the Artificial Intelligence Revolution? Would you like to work with world-class systems architects and deep learning experts to define the next generation SoC? we are developing processor and system architectures that are at the forefront of accelerating machine learning, automotive and high-performance computing applications. We are building the most advanced SoC's in the world for these applications.
In this position, you will develop Data sets, AI Models and Train AI models for advanced system architecture Power and Performance features, you will have the chance to explore and define future aspects of our architectures that bring together our company's GPUs, custom processors and accelerators into a single chip. As part of the development flow you will be involved with building performance models, automating analysis work flows, data generation and characterisation for pre and post silicon. You will work with our HW & System architects, software, ASIC design, verification, physical design, VLSI and platform teams. Our SoC architects excel at pushing the state of the art, while making the best engineering trade-offs.
What youll be doing:
Dataset generation, preparation, AI model training and algo tuning.
Perform performance, perf @ watt, and power modelling and analysis to optimize our architecture. System C/C++ model development and validation. For Early SW development and verification Reference
Drive automation & tools for architectural exploration and analysis work.
Post-Silicon production support with silicon debug, analysis for performance and power optimization.
Collaborate closely with our SoC Architects to understand and initiate efficiency improvements.
Understand and analyze the interplay of hardware and software architectures on future algorithms and applications.
Requirements:
B.Sc., M.Sc. or Ph.D. in Computer Science, Electrical Engineering, or a related field.
5+ Years of relevant experience
Programming experience and proficiency in Python, System C/C++ development skills and familiar with Linux developing environment.
Strong interpersonal and organizational skills and the ability & desire to work as a great teammate.
Excellent analytical, and verbal interpersonal skills and ability to work as part of a team
Independence and drive to lead initiatives to enhance our work flows and architectural development process.
Ways to stand out from the crowd:
Data scientist experience
Background in Power and Performance model development
Experience in architecture work flows automation and tooling
Theoretical and practical knowledge in accelerated computing, machine learning, NLP, AIGC, LLM, AI4S, etc
Experience in CUDA and deep learning frameworks (i.e TensorFlow or PyTorch) & Proficiency with Python and data analysis packages like: Pandas, NumPy.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8318032
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דיווח על תוכן לא הולם או מפלה
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Petah Tikva
Job Type: Full Time
As a Quality and Reliability (Q&R) Engineer, you will lead the qualification and long-term reliability of advanced System-on-Chip (SoC) semiconductor products for automotive applications. Youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
What will your job look like:
Define and manage Quality and Reliability specifications, simulations, and qualification plans for SoC die and package.
Plan and execute automotive-grade qualifications per standards such as AEC-Q100, JEDEC JESD22, and IATF 16949.
Design and implement die-level and package-level stress tests.
Select and prepare electrical, environmental, and mechanical test platforms for reliability testing.
Define requirements for Pre-Si Q&R (e.g. ESD, LU, EM, IR drop), Design-for-Test (DFT), electrical characterization, and Post-Si Q&R testing of digital, mixed-signal and RF SoCs.
Collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (OSATs).
Lead failure analysis, reliability modeling, and corrective action processes (e.g., 8D, FMEA, FMEDA).
Document and certify automotive standards compliance, including PPAP/APQP deliverables.
Requirements:
BSc/MSc in Electrical Engineering, Physics, or related field.
5+ years of experience in semiconductor Q&R, preferably with SoCs, ASICs, VLSI, or RF ICs.
Strong knowledge of semiconductor physics, packaging technologies, materials and reliability mechanisms.
Hands-on experience with Q&R test design and environmental stress testing.
Deep understanding of failure prediction models, reliability simulations, and statistical analysis.
High proficiency in English, including strong verbal, reading, and writing skills.
Familiarity with RF reliability concerns advantage.
Expertise in automotive Q&R standards, including AEC-Q100, IATF 16949, and JEDEC/ISO/IEEE protocols -advantage.
Experience with advanced packaging Q&R (e.g., WLCSP, FCBGA) -advantage.
Exposure to radar or ADAS/AV automotive systems Q&R advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8316151
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
28/08/2025
Location: Tel Aviv-Yafo and Herzliya
Job Type: Full Time
Are you looking for a great opportunity to further your career? We are investing in the rapid growth area of Hardware Assisted Verification (HAV).

Our most successful multi-national customers are using our HAV platforms to verify some of the worlds most advanced System on Chip (SoC) designs. HAV solutions are expanding to a wider audience of smaller companies who are benefiting from early software development and ultra-fast hardware verification through hosted services.

We are looking to hire a Senior Consultant with either Emulation or FPGA prototyping knowledge and experience. This role is ideally suited to someone with a good understanding of HAV platforms who can guide customers through successful HAV deployment and design validation. This is a great opportunity to work with some of the most interesting and innovative people and companies across the semiconductor industry.

The consultant role will be mainly focused on technical services delivery. This could range from platform enablement to methodology guidance. Interactions may be direct with the customer or collaborative through a wider technical team. This position will require a combination of remote, office and onsite working. As a consultant, you will also be expected to uncover opportunities, scope engagements, promote offerings, and grow new business.
Requirements:
Technical Competencies:
A good understanding of HAV platforms and infrastructure (e.g. Strato, Primo or proFPGA enterprise-level systems would be preferable).
A good understanding of HAV compilation and runtime flows (e.g. Veloce or VPS would be preferable).
Practical insights into the application and usage of HAV.
Knowledge of design mapping, testbench mapping and pre-silicon validation.
Familiarity with HAV debug solutions (probes, waveforms, assertions, coverage, etc.).
Knowledge of virtual TestBench eXpress (TBX) and/or In-Circuit Emulation (ICE) use-cases.
Proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification.
Strong background in functional verification, RTL synthesis, design partitioning and place-and-route.
Conversant with SoC design and architecture concepts.

Desirable Competencies:
Familiarity with data center hosting and cloud-based solutions.
Knowledge of standard interface protocols such as AMBA, PCIe, DDR, etc.
Commercial awareness of EDA companies and solutions.
Linux, Tcl/Python/shell, C/C++, DPI, SCE-MI, SystemC, UVM Connect, UVM Framework.
Simulation using Questa Sim and Visualizer.
Background in consulting or other customer services subject area.

About You:
BSc/MSc qualified in Electronic Engineering, Computer Engineering or Computer Science.
Team player and individual contributor.
Lateral thinker and problem solver with a pragmatic approach.
Excellent communication and presentation skills.
Outgoing and enthusiastic personality.
Happy to learn new technologies and methodologies when needed.
English language mandatory, other European languages beneficial.
Ability and willingness to travel including rights to work onsite within EMEA.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8322814
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
The company Cloud and AI Infrastructure team in Israel focuses on building our company's next-generation systems. The teams work is grounded in creating custom hardware, and as an Intern you'll get to collaborate with engineers from various parts of the organization to influence the future of our company Cloud and the AI infrastructure by working on the foundational technology that makes it all possible. This is the hardware that powers everything from our company Cloud, to our most advanced models like Gemini.
As an intern, you will work on fundamental problems at the intersection of hardware, software, and algorithms. You will collaborate with exceptional engineers and researchers on projects that directly impact our company's custom silicon portfolio, including general-purpose CPUs, highly specialized AI accelerators like our Tensor Processing Units (TPUs), and complex Systems-on-a-Chip (SoCs). Your responsibilities and projects will be tailored to your expertise and could focus on any part of the system stack. This may include:
Algorithmic Innovation: Developing and analyzing new algorithms that are deeply co-designed with our custom hardware.
Software and Compilers: Building the software stack, compilers, and performance analysis tools that unlock the potential of our unique architectures.
System Architecture and Modeling: Architecting and modeling future CPUs, TPUs, and SoCs to guide critical design decisions.
Hardware Design and Verification: Contributing to all aspects of silicon creation, from logic design and verification to VLSI physical implementation.
our company Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our companys cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to our company Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Responsibilities and detailed projects will be determined based on your educational background, interest, and skills.
Requirements:
Minimum qualifications:
Currently enrolled in a PhD degree in Electrical Engineering, Computer Engineering or a related technical field in Israel, and in your second or final year of education.
Experience working with data structures or algorithms during coursework/projects, research, internships, or practical experience in school or work (e.g., open-source coding).
Relevant practical research or internship experience with one or more of the following: Architectural Modeling, Simulation, or developing software for computing.
Relevant practical or internship experience working in C++ programming.
Ability to communicate in English fluently to partner with stakeholders.
Preferred qualifications:
Relevant practical or internship experience, or personal project experience in Hardware or Electrical Engineering.
Relevant programming experience in one or more of the following languages: Python, C, C++, Java, JavaScript.
Ability to complete a 13-17 week full-time internship in Israel starting in either May, June or July 2026.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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