דרושים » חומרה » Physical Layer Firmware Architecture Engineer

our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

Join our innovative Mixed-Signal Design group as a SerDes/PHY Micro Architect, and help shape the future of high-speed silicon for next-generation networking and GPU's ASICs. In this strategic role, you will define and refine system-level features and micro-architecture requirements for advanced SerDes and PHY IP, with a special focus on firmware (FW) architecture and CD architecture integration.
You will be involved end-to-endfrom early requirements through pre-silicon architecture to post-silicon bring-up and customer-facing debugcollaborating closely with design, verification, firmware, hardware, and system teams. Your work will enable cutting-edge technologies such as CPO and NVLink.
What Youll Be Doing:
Define system-level features and micro-architecture requirements for SerDes technology, bridging hardware and firmware domains.
Align architecture definitions with both FW development and CD implementation flows, ensuring seamless integration across product stages.
Translate system and customer requirements into scalable, actionable features for next-generation silicon.
Drive and contribute to all silicon development phases: pre-silicon specification, hands-on lab bring-up, validation, debug, and customer support.
Collaborate with cross-functional teams across ASIC design, verification, firmware, board engineering, and customer delivery.
Lead or contribute to technical reviews, issue root-cause analysis, and architectural methodology improvements.

Our technology has no boundaries! we are building the worlds most groundbreaking and state-of-the-art accelerated computing platforms. Because of our work, scientists, researchers, and engineers can advance their ideas. We pioneered a supercharged form of computing loved by the fastest-paced computer users in the worldscientists, designers, artists, and gamers.
We seek a highly motivated Senior AI Network System Architect to join our team of experts and help shape the foundational infrastructure for the AI revolution. Our next-generation networking systems are at the forefront of connecting and powering the world's most advanced AI clusters. As a key member of our architecture team, you will be responsible for a wide range of critical activities, from deep technical analysis and performance modeling to strategic architectural studies, ensuring our company continues to innovate and lead.
What Youll Be Doing:
Define, develop, and execute cutting-edge benchmarks and workloads to analyze system performance, identify bottlenecks, and drive optimizations across our hardware and software stack.
Drive the direction of our future products by performing deep-dive analysis of system architectures and solutions to assess their performance, efficiency, and value proposition.
Develop and validate sophisticated performance and network simulation models, correlating them with real-world hardware to predict and analyze the behavior of future systems.
Analyze and optimize the entire AI stack, including communication libraries (like NCCL) and system software to the underlying network fabric, developing Proof-of-Concepts (POCs) for new features and improvements.
Conceptualize next-generation networking architectures driven by emerging DL and AI technologies.
Collaborate with multi-functional teams, including other architecture teams, logic design, system software, firmware, and DL research teams, to ensure the successful execution of our vision.

our company SOC Architecture team is looking for a Senior Data Scientists with SW development skills and HW-System architecture experience. Do you want to be part of the Artificial Intelligence Revolution? Would you like to work with world-class systems architects and deep learning experts to define the next generation SoC? we are developing processor and system architectures that are at the forefront of accelerating machine learning, automotive and high-performance computing applications. We are building the most advanced SoC's in the world for these applications.
In this position, you will develop Data sets, AI Models and Train AI models for advanced system architecture Power and Performance features, you will have the chance to explore and define future aspects of our architectures that bring together our company's GPUs, custom processors and accelerators into a single chip. As part of the development flow you will be involved with building performance models, automating analysis work flows, data generation and characterisation for pre and post silicon. You will work with our HW & System architects, software, ASIC design, verification, physical design, VLSI and platform teams. Our SoC architects excel at pushing the state of the art, while making the best engineering trade-offs.
What youll be doing:
Dataset generation, preparation, AI model training and algo tuning.
Perform performance, perf @ watt, and power modelling and analysis to optimize our architecture. System C/C++ model development and validation. For Early SW development and verification Reference
Drive automation & tools for architectural exploration and analysis work.
Post-Silicon production support with silicon debug, analysis for performance and power optimization.
Collaborate closely with our SoC Architects to understand and initiate efficiency improvements.
Understand and analyze the interplay of hardware and software architectures on future algorithms and applications.

we are seeking a technical leader interested in defining, crafting, implementing, and guiding the implementation of security research, architecture, implementation, and design for next-generation our company Networking products. You'll be expected to take a strong hands-on role, working with diverse teams across our company and with external partners to meet security requirements for our state-of-the-art network products.
our companys invention of the GPU 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as the AI computing company. We are looking to grow our teams with the smartest people in the world. If you're creative and autonomous, we want to hear from you!
What you'll be doing:
Research, design, develop and implement architecture solutions (Hardware and software) meeting internal and external security requirements and standards.
Apply innovative hardware security primitives to enable next generation secure software extensions supported by hardware.
Design next generation production and provisioning systems.
Collaborate with partners on the implementation of open-source software.
Collaborate across the company to guide the direction of Its (USB, I2C, I3C, UART, PCI) working with hardware, software, research and product teams.
Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing infrastructure enabling trusted platforms using hardware security methods.
Work with customers, partners to identify and address security issues and threats.

Our technology has no boundaries! we are building the worlds most groundbreaking and state of the art accelerated compute platforms for the world to use. Its because of our work that scientists, researchers and engineers can advance their ideas. We pioneered a supercharged form of computing loved by the fastest paced computer users in the world - scientists, designers, artists, and gamers.
We are seeking a highly motivated architect to join our team of experts and take part in shaping the future of high-performance and ML / AI computing. Our next-generation InfiniBand and NVLink systems will be at the heart of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today. As a system/software architect at our company, you will have the opportunity to work on some of the most innovative technology that is currently driving the world forward.
What youll be doing:
Define the next generations of our company's communication SW architecture.
Research of various solutions by defining and running POCs, evaluate SW and HW impact and conveying the solution architecture to the relevant teams. The solutions can span over various layers: from algorithms and high level software to firmware and HW.
Collaborate with multi-functional teams, including other architecture teams, VLSI logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are now looking for a AI Networking Chip Security Architect we are looking for an outstanding security architect with Networking focus to design, validate, and guide implementation of secure architecture of its core products. The candidate is expected to: define problems & deliver highly innovative solutions that lead to significant differentiation in the industry, translate customer needs into architectural, technical & strategic direction, and help to resolve objectives & long-range goals of the Security organization. Leaders in this role will help reduce risk, threats, and vulnerabilities and design new security technologies in our company networking products.
What youll be doing:
Own the security requirements for next gen networking chips in a verity of product lines.
Lead new security technologies definitions into the roadmap of our company Networking devices.
Work with technical and senior leadership staff to turn business directives into functional implementations.
Collaborate between multiple business units and development groups to ensure robust, secure service posture from design to implementation.
Provide hands-on security engineering expertise across a wide variety of platforms.
This role extends across multiple groups and excellent working knowledge in the following areas of expertise is necessary for success:
Chip Security Architecture
Embedded System Architecture and Design
Security around interconnects and protocols
Security Standards
Cryptography.

We are currently seeking a Senior Silicon Security Architect.
we are seeking a technical leader interested in defining, crafting, implementing, and guiding the implementation of security research, architecture, implementation, and design for next-generation our company Networking products. You'll be expected to take a strong hands-on role, working with diverse teams across our company and with external partners to meet security requirements for our state-of-the-art network products.
What you'll be doing:
Research, design, develop and implement architecture solutions (Hardware and software) meeting internal and external security requirements and standards.
Apply innovative hardware security primitives to enable next generation secure software extensions supported by hardware.
Collaborate with partners on the implementation of open-source software.
Collaborate across the company to guide the direction of Silicon security, TEE, working with hardware, software, research and product teams.
Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing infrastructure enabling trusted platforms using hardware security methods.
Work with customers, partners to identify and address security issues and threats.

our companys Product Engineering group is looking for a well experienced Test architect to join our family and be a part of System Product Engineering. The System Product Engineering team is responsible to assure that our companys customers will get the best state of the art high-quality products using the below:
Development and deployment of automatic testers for our companys network business units (Computing network adapters and High-speed switch systems) including hardware and software
Analyzing and monitoring the manufacturing data and find / prevent quality issues based on big data using Machine learning, statistical tools, and AI (artificial intelligence)
Leading smooth production and capacity enlargement
Failure analysis of return material from customers to understand the reason of failures.
Validate the test performance and stability using QA (V&V validation and verification) methods
The teams are involving and part of the full product lifecycle from architecture definition trough development till the product will be EOL (end of life). As part of the effort mentioned above, we are looking for an Electronic Engineer to join the System Design Testing Architecture team and lead Systems HW testability definition for our company's Networking systems.
What youll be doing:
Leading optimal products testing definitions includes: HW, SW, FW, Mechanical fixtures, and cables/harnesses for customized production testing set ups.
Making pitches in front of large audience a new product testing architecture, DFT and testing method while providing justifications for the testing concept.
Responsible for product testing maximum coverage, Testing specification documents and production test flow process for each system
Working with Companys engineering team during the developing process of the product from pre-design trough the design and influence on the product design from DFT design for testability aspects.
Supporting production ramp up and scalability, lead and fast responding time for ECR/ECO implications.
Examine New Technologies, testing capabilities and their implementation for the next generation products
Ensure testing set ups and coverage are met the DFT requirements and timetable
Lead DFT Risk assessment and drive mitigations to reduce the risks.