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we are looking for a Planner to join their team!

In this role, you will be responsible for planning, coordinating, and monitoring production activities to ensure on-time delivery, material availability, and efficient execution of production plans.

Responsibilities

Build and manage production plans and schedules
Monitor production progress and ensure on-time delivery
Analyze MRP and manage material availability
Coordinate with Production, Purchasing, Warehouse, Engineering, and Quality teams
Support ECO/EO implementation and maintain work orders
Prepare operational reports and KPIs
Identify and resolve supply and production constraints

we are looking for a Software Principal Engineer.
Key Responsibilities :
As a Principal Software Engineer, you will:
Design, develop, and own complex software features - from requirements and design through implementation, testing, and long-term support.
Build high-performance datapath software on SPDK, integrating emerging drive, enclosure, and protocol technologies.
Own performance analysis of the storage software data path - including queueing behavior, CPU efficiency, memory usage, PCIe bottlenecks, and latency behavior.
Work closely with architecture, hardware, and software teams on HW/SW interface definition.
Experiment with and integrate emerging AI tools into the development workflow to boost productivity and innovation.
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we are looking for a SQA Engineer to join our team!

Key Responsibilities:

Design, develop, and maintain automated tests for embedded products using C# and NUnit.
Execute manual and automated test plans, analyze results, and report defects.
Prepare and maintain test documentation, including STP, STD, and STR.
Investigate, reproduce, and track software defects through resolution.
Collaborate closely with R&D, software developers, and cross-functional teams to ensure product quality.
Participate in test planning, design reviews, and quality improvement activities.
Support continuous improvement of QA processes, methodologies, and automation frameworks.
Report to the SQA Team Leader.

As an AI Product Owner & AI Process and Agentic Designer, you will own the process of transforming complex workflows into scalable AI solutions, bridging the gap between business stakeholders and AI Engineers. You will lead business process analysis, identify agentic process opportunities, validate business value, and define solution designs that enable successful AI implementation across the organization.

Responsibilities

Business Process Analysis & Discovery
Partner with business stakeholders to map, document, and analyze existing workflows, identifying inefficiencies, bottlenecks, and manual processes ripe for automation.
Conduct discovery sessions and workshops to deeply understand business needs, pain points, and success criteria across departments.
Agentic Opportunity Identification
Evaluate workflows to pinpoint where agentic and AI-driven approaches can deliver the most value, distinguishing tasks suited to automation, augmentation, or full agentic orchestration.
Maintain a prioritized pipeline of AI/agentic opportunities, assessing each for feasibility, complexity, and impact.
Business Value Validation
Define and quantify the expected business value of proposed solutions (e.g., cost savings, time reduction, quality improvement, revenue impact) and build the business case for investment.
Establish success metrics and KPIs, and track realized value post-implementation to ensure outcomes match projections.
Solution Design & Definition
Translate business requirements into clear solution designs, including agentic process flows, decision logic, data inputs/outputs, integration points, and human-in-the-loop checkpoints.
Define guardrails, escalation paths, and fallback behaviors to ensure solutions operate safely and reliably.
Stakeholder & Engineering Bridging
Serve as the primary liaison between business stakeholders and AI engineers, translating business intent into technical requirements and engineering constraints back into business terms.
Own the product backlog, prioritize features, and clearly communicate scope, trade-offs, and timelines to all parties.
Implementation Enablement & Iteration
Guide solutions through the full lifecycle from concept to deployment, supporting testing, validation, and change management.
Gather feedback, monitor performance, and drive continuous refinement of deployed AI and agentic solutions.
Scalability & Standardization
Identify reusable patterns, components, and best practices to scale successful solutions across the organization.
Contribute to governance frameworks, documentation standards, and design principles for AI/agentic product development.

we are seeking an experienced and visionary ML Engineer to join our dynamic technology organization. The successful candidate will be a part of a team of talented AI Engineers, Building agentic AI solutions, driving innovation and delivering business value through advanced Generative AI solutions & machine learning techniques. This role requires a strategic thinker with hands-on expertise in both traditional and cutting-edge Gen AI and LLM methodologies and a passion for continuous learning and development.

Responsibilities

Build the solution: Own end-to-end technical delivery of agentic systems, from source-system integration through agent design, development, evaluation, and production deployment.
Integrate AI systems with source systems (Salesforce, Databricks, Splunk, internal APIs, business applications). Handle agent harness and orchestration.
Handle the operational handover to the business function and any necessary support transition.
Collaborate across teams: Partner closely with data engineering, platform, security, and business teams to align on requirements, dependencies, and integration points.
Engage stakeholders: Gather requirements directly from business functions, communicate technical trade-offs clearly, and keep stakeholders informed on progress, risks, and timelines.
Uphold quality and reliability: Establish and maintain best practices for code quality, testing, evaluation, monitoring, and observability of deployed AI systems.
Contribute to the team's technical growth through knowledge-sharing and help shape engineering standards and reusable patterns.
Stay current: Continuously evaluate emerging Gen AI, LLM, and agentic frameworks, and recommend tools and approaches that improve delivery speed and solution quality.

we are looking for a Software Engineer Technical Leader.
As a Software Engineering Technical Leader, you will drive the technical vision and execution for complex security policy and access solutions that safeguard enterprise networks globally.
You will leverage your deep expertise in systems programming using C, C++, and Java to architect and develop robust, scalable software. By providing technical leadership, you will mentor peers, guide architectural decisions, and foster a culture of innovation and continuous improvement within the team. Your work will directly contribute to mission by ensuring our network access solutions are secure, programmable, and highly reliable. You will also champion software programmability and integrate automation and orchestration practices to streamline development and enhance product performance, ultimately empowering our customers to connect with confidence.

Join the Front-End Design team, at the core of silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab

Come join us and help shape groundbreaking solutions by designing, developing, and testing some of the most complex ASICs in the industry.
What You Will Do:
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
Handle all chip validation aspects, including:
Building validation plans.
Performing EPSV using advanced test and measurement equipment.
Writing tests in Python over device SDK.
Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

we are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the team, which is at the heart of software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.

We are excited to announce that the Cisco Silicon One team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team:
Join the Cisco Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed

we are seeking a highly motivated and experienced Senior Software Engineer for a position focused on developing innovative network device monitoring and visualization solution.
Meet the Team:
This position is part of organization, based in Israel. Silicon One is the foundation of industry-leading networking hardware products, pushing the boundaries of technology and driving the next generation of high-performance, scalable solutions.
Your Impact:
Design and develop visualization capabilities within our SDK environment
Lead the development of a brand-new comprehensive self-monitoring system for network devices from the ground up
Implement a comprehensive model for capturing and managing network state information
Drive cross-team collaboration and technical strategy
Work closely with senior technical leadership
Create and refine technical requirements and system designs
Build new systems and frameworks from the ground up

Our Board Design Team is growing! Youll collaborate with top industry engineers within the fast-growing Cisco Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices-Cisco Silicon One. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.

We are looking for an experienced Design Verification engineer to join our DFT team and help establish and grow DFT DV activity in the Cisco SiliconOne DFT team. This role is relevant for engineers with experience in DV roles, either in DFT DV or in other verification domains, who are interested in becoming familiar with DFT design, verification methodologies, and the challenges of validating testability features in advanced silicon.
Your Impact:
Lead and drive DFT verification activities within the Cisco SiliconOne DFT team.
Develop verification plans, environments, checkers, assertions, and coverage models for DFT features.
Verify DFT architecture and implementation in close collaboration with DFT, design, architecture, and verification teams.
Work on verification of scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features.
Debug complex pre-silicon issues across RTL, verification environments, and DFT logic.
Contribute to scalable methodologies, reusable verification components, and best practices for DFT DV.
Help bridge between general DV methodologies and DFT-specific design and verification needs.