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We are looking for a motivated Hardware Engineer to join our Hardware team in Raanana.

You will have the chance to develop your own skills in a flexible and energetic work atmosphere with friendly and experienced colleagues. You will have helpful supervision, opportunity to learn, modern tools and flexible work culture.

If you want to be a part of our growing company that is driven by innovation and is focused on building a future together with our employees, consider applying.

Principle duties and responsibilities:

Design hardware modules, subsystems and systems for synchronization products.

Develop schematics and guide PCB layout (high-speed, mixed-signal, power).

Select and evaluate components (ICs, power devices, oscillators, interfaces).

Design high-speed interfaces (e.g., 10G/25G Ethernet) with signal integrity considerations.

Contribute to hardware design specifications (HDS) and documentation.

Support system-level integration (HW, FPGA, SW).

Define and execute validation and integration test plans.

Debug complex board and system-level issues (mixed-signal, high-speed).

Perform lab bring-up, measurements, and performance characterization.

Support product transfer to manufacturing (NPI).

Collaborate with manufacturing and test teams for production readiness.

Investigate and resolve issues during production and field operation.

Ensure product reliability, quality, and compliance with applicable standards.

Functional Collaboration.

Work closely with FPGA, software, system, SIT/SVT and mechanical teams.

Participate in design reviews and technical discussions.

Interface with suppliers and external partners as required.

Evaluate and introduce new technologies and components.

Drive improvements in performance, power efficiency, and cost.

Contribute to system architecture discussions and design trade-offs.

Required ASIC Design & Verification Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Silicon One is transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required PHY Post Silicon Validation Engineer
Job Description
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
You'll be part of our Group driving our game changing next generation network devices - Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment. As a Wireless MAC System Architect, you will be a core member of our highly innovative and visible Wireless System-on-Chip (SoC) design team that defines modem architectures, develops MAC-layer algorithms, and invents embedded DSP algorithms for chips enabling exciting new wireless applications. You will be responsible for developing state-of-the-art wireless SoC products that are enjoyed by millions of our customers. Application areas include ultra-wideband sensing and specialized wireless audio; products enabled or improved by our teams SoCs include specialized audio headsets (such as AirPods), watches and iPhones.

In this role you will be responsible for the architecture of the Connectivity IP with focus on the MAC sub-system: - Define, document and Spec Connectivity MAC architecture and performance requirements.
- Analyze & simulate the performance of the Connectivity IP in real-life use-cases, achieving benchmarking performances in several metrics, including Throughput, Robustness, Co-existence with other Wireless IPs and more.
- Working closely with other architects (PHY, Power Management, FW and SW) to introduce best in class Connectivity IP solution.
- Develop innovative system architectures and protocols to deliver best-in-class performance for the MAC subsystem of custom wireless silicon solutions.
- Introduce cross-domain features where opportunities exist for innovation to achieve enhanced performance.
- Produce MAC architecture, specifications and corresponding performance/reference modeling in support of digital HW and FW design and verification efforts.
- Develop and maintain a MAC systems infrastructure applying the best methodologies for system-level simulation, pre-silicon prototyping (including emulation and FPGA prototyping), FW QA, regression and MTBF testing, and system verification to ensure first-time design success.
- Support the delivery of new wireless technologies to the Product Systems teams.

Required PHY System
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are seeking a CAD LEQ (Logical Equivalence Checking) Engineer to develop, deploy, and support equivalence checking methodologies across complex SoC programs. This role focuses on ensuring functional correctness between RTL, synthesized netlists, and post-implementation designs, while driving scalable, robust sign-off flows.

Responsibilities
Own and maintain LEQ sign-off methodology across RTL-to-GDS flows.
Develop and support flows using tools such as Cadence Conformal and equivalent industry solutions.
Drive power-aware equivalence checking including CPX flows.
Enable ECO flows, ensuring safe and correct implementation of late-stage design changes.
Debug equivalence failures and perform root-cause analysis across RTL, synthesis, and PnR stages.
Collaborate with design, synthesis, PD, and power teams to resolve mismatches and improve convergence.
Optimize runtime, capacity, and scalability of LEQ flows for large SoCs.
Define best practices, guidelines, and automation for LEQ usage across projects.
Partner with EDA vendors to resolve tool issues and drive feature improvements.

Required Senior Electrical Post Silicon Validation- Silicon One
Job Description
Meet the Team
We are a dynamic group of engineers dedicated to pushing the boundaries of technology. Our mission is to validate and drive the performance of Silicon One products, ensuring they meet the highest standards of quality and reliability.
Operating at the forefront of technology, we work with latest, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, applying our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us, and be a part of a team where professionalism meets impact!
Your Impact
Drive the resolution of complex silicon performance and characterization issues through deep, multi-functional collaboration with architecture, design, and software teams. Leverage these technical insights to provide critical feedback that directly influences the design, debuggability, and architectural specifications of future silicon components
Key Responsibilities:
Lead the Electrical Post Silicon Validation efforts for Silicon One products, focusing on high-speed and power-intensive devices. Collaborate with multi-functional teams to drive the silicon validation process, from architecture through to physical design and DFT. Analyze and interpret characterization data to guide design improvements and ensure product excellence. Develop and execute test plans to validate silicon performance and reliability against stringent specifications. Troubleshoot and resolve issues related to silicon performance and characterization.
Why Join Us:
Be part of team at the forefront of silicon technology, working on the most advanced products in the market. Work closely with some of the best engineers in the industry, driving innovation and excellence in silicon characterization. We are a fast growing team that values talent and provides ample opportunities for professional development and career advancement.

Develop and maintain internal EDA tools and frameworks for RTL assembly and connectivity checking.
Implement efficient algorithms for hierarchical RTL construction, module binding, and interface consistency across complex SoCs.
Build intelligent connectivity, visualization, and debug utilities.
Collaborate with front-end design, DFT, and integration teams to align methodologies and define tool requirements.
Drive automation and performance improvements, including runtime optimization and scalability across large designs.
Support adoption, documentation, and user training for internal design teams.

As a Wireless Firmware Architect you will focus on defining technical direction, conducting research and analysis, and providing architectural guidance for our Bluetooth embedded solutions.

The position emphasizes wireless protocol design and simulations, software architecture definition, technical planning, proof-of-concept development and performance optimizations.

Responsibilities:
Define comprehensive software architecture for our Bluetooth embedded solutions.
Establish firmware architectural guidelines and principles.
Support development teams with architectural guidance and consultation.
Integrate performance and power analysis requirements into architectural frameworks.
Create technical demonstrations to support architectural decision-making.
Monitor and analyze hardware implementations to ensure alignment with software architectural requirements.
Evaluate hardware design decisions and their impact on firmware architecture.
Collaborate with hardware teams to provide architectural input and recommendations.
Design and develop proof of concept (PoC) projects to validate architectural approaches.
Research and prototype emerging wireless technologies and methodologies.
Evaluate feasibility of new technologies and integration approaches.
Design and develop wireless protocol simulation frameworks, develop intelligent simulation environments for protocol validation and optimization.
Analyze new standards and specifications for architectural implications.
Track industry trends and emerging wireless technologies.

Required IC Package Layout Designer
Job Description
Meet the Team
Join the Package Design Team at Silicon One in Israel, a group leading the way in developing our groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of our silicon development, we design and optimize advanced package solutions for some of the industrys most sophisticated ASICs. Youll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies.
Your Impact
This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Silicon One initiative. As a layout engineer, you will drive the entire package design layout process-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will work closely with engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading packages. Youll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success.
Responsibilities:
Lead package layout design while planning and driving schedules from initial concept through full implementation.
Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability
Collaborate with signal integrity (SI) and power integrity (PI) teams to ensure design quality and efficiency
Enhance design methodologies and partner with vendors to improve product quality and efficiency
Drive innovation in package solutions for our next-generation ASICs.

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Required PHY Firmware Technical Leader
Meet the Team
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices

We are seeking a visionary and results-oriented Hardware Group Director to lead our hardware department.
In this role, you will be responsible for the end-to-end hardware development life cycle, from initial architecture and high-level design to mass production and field support. You will lead a multidisciplinary team of engineers, including mechanical, electronics, motion, and hardware experts, driving innovation while ensuring high-quality execution, on-time delivery, and alignment with company business goals.
What will you be doing:
Technical Leadership & Strategy
Define and drive the hardware technology roadmap and architecture for next-generation products.
Lead critical design reviews to ensure engineering excellence and minimize design iterations.
Identify and evaluate emerging technologies and vendors to maintain a competitive edge.
Oversee DFx (Manufacturing, Testing, serviceability) to ensure seamless transition from R&D to production.
Team Leadership & People Management
Build, lead, and mentor a high-performing multidisciplinary team across electronics, motion, and mechanical engineering.
Foster a culture of innovation, collaboration, and continuous professional growth.
Drive resource planning, project allocation, and performance management processes.
Lead recruitment efforts to attract and retain top-tier engineering talent.
Project Execution & Operations
Own the end-to-end hardware project lifecycle, ensuring on-time delivery and alignment with budget and quality targets.
Manage relationships with key suppliers and global manufacturing partners.
Oversee departmental budgets, lab infrastructure, equipment procurement, and EDA tool strategy.
Ensure compliance with global regulatory and quality standards.
Cross-Functional Collaboration
Lead a matrixed hardware group supporting multiple product lines and engineering domains.
Serve as the primary technical interface to executive leadership, providing clear visibility into progress, risks, and mitigation plans.

The Motion Control & Electronics department is seeking a Motion Control Engineer to develop complex metrology systems for ultra-high-precision measurements of semiconductor manufacturing processes.
These systems incorporate high-end performance motion devices whose development requires proficiency in motion control systems.
In this role, you will join Motion Control group. You will be designing, developing, and implementing advanced motion systems for the next-generation Optical Critical Dimension metrology tools, as part of a world-class R&D division.
What will you be doing:
Develop and implement unique solutions that integrate advanced motion control technologies, delivering innovative and out-of-the-box approaches using cutting-edge, high-end technology.
Leverage strong engineering expertise to develop and optimize servo control systems, including algorithm design and custom solution implementation.
Analyze and optimize motion control system performance to ensure compliance with specifications and stability requirements.
Take ownership of suppliers and manufacturers, define equipment specifications, and stay up to date with the latest technological developments.
Present and explain product specification definitions and design reviews from a motion and electronics engineering perspective.
Conduct testing, inspection, and troubleshooting of motion control and electronics modules and subsystems.
Collaborate closely with R&D teams on motion control and servo solutions, supporting lab setups, prototypes, and jigs.