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We are seeking a senior security architect who is passionate about advancing cybersecurity in networking products to join our team. This is an opportunity to work on groundbreaking projects to secure high-performance networking systems.

What you'll be doing:

Collaborate across the company to guide the direction of a converged NIC, working with hardware, software, research, and product teams.

Research, design, develop, and implement architecture solutions (Hardware and software) meeting internal and external security requirements and standards.

Apply innovative hardware security primitives to enable next-generation secure firmware and software supported by innovative hardware.

Collaborate with internal and external partners on the implementation of open-source software.

Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing infrastructure enabling trusted platforms using hardware security methods.

Work with customers, partners to identify and address security issues and threats.

We are looking for a Chip-Design Verification Engineer to join our Network Adapter Silicon group. As a Chip-Design Verification Engineer in our Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.
Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.

What youll be doing:

Create and implement electrical validation plans for new products.

Analyze and interpret validation results to identify potential issues.

Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.

Design and develop test scripts and frameworks to automate validation processes.

Work closely with software and firmware teams to ensure seamless integration.

Provide technical expertise and guidance to junior team members.

Maintain accurate documentation of validation activities and results.

Our Networking HW Qual team is looking for a System Electrical Characterization and Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have analog approach, have passion for lab work, data analysis and post-Si hands on problem solving? We will be happy to have you on our team!

We are looking for a skilled and experienced Engineer with a focus on System Electrical Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our advanced products. You will collaborate closely with PHY design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.

What youll be doing:

Create and implement electrical validation plans for new products.

Analyze and interpret validation results to identify potential issues.

Collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.

Design and develop test scripts and frameworks to automate validation processes.

Work closely with software and firmware teams to ensure seamless integration.

Provide technical expertise and guidance to junior team members.

Maintain accurate documentation of validation activities and results.

We are looking for a hardworking and engaged Senior QA SW Engineer with experience in Networking to join the System Ethernet QA Team! Our QA team is responsible to test and qualify the Ethernet Switches solutions. We learn new features, design, execute, write automation based on Python! We are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

What you'll be doing:

Review the Arch design and requirements for new features introduced in the product.

Design, develop, and execute tests for the new features, as part of SW GA releases and update releases.

Report bugs found during execution, assist with reproduction and debugs in order to understand root cause verify bug fixes provided by the R&D team, raise if not fixed.

Execute system tests in different scopes: regression, performance, functional, security for Ethernet protocols.

Write automation tests and framework APIs based on the Python language.

We are looking for a creative AI/HPC software architecture intern to define the future high performance computing and networks. As a part of the team you will lead research, development, and deployment of innovative solutions in the networking hardware, programming environments, and system software to make future high-end computer systems more performant, scalable, and more usable. Come join the team and see how you can make a lasting impact on the world.

What you will be doing:
Creating prototypes to evaluate and motivate extensions in programming models (CUDA, NCCL, MPI, OpenSHMEM), new designs in runtimes, and new features in the network hardware.
Research, design and implement features for HPC communication middleware and Deep Learning frameworks such as TensorFlow and PyTorch.
Work with hardware architects to define the future hardware relevant for scientific applications, Deep learning, and data-intensive workloads.

We are looking for an experienced and dedicated Software / Automation Engineer to join the Firmware Regression & Automation team. In this role, you will be responsible for monitoring and maintaining the stability of the Firmware regression cycle, creating tools and automations, assigning and prioritizing bugs, and serving as the final gatekeeper before Firmware releases. The Firmware team drives the development of cutting-edge networking technology to meet the quality demands of industry-leading customers. You will collaborate closely with our networking NIC Firmware team, gaining a deep understanding of our products and technologies.

What you will be doing:
Oversee the regression cycle, involving substantial hands-on work in automating flows, generating reports, identifying and debugging issues, and thoroughly documenting quality bugs. Collaborate closely with Firmaware release teams to ensure high-quality delivery.
Take ownership of the regression infrastructure and test stability. Develop automation and tools to ensure top-tier system stability and efficiency.
Generate reports and present regression status updates. Identify degradations between Firmware versions. And take ownership of the regression automation infrastructure and tools.
Develop a top-level understanding of the test flows to effectively assign quality bugs, perform basic troubleshooting and fixes, and apply high-quality patches.
Fully understand the requirements, Firmware flows, and processes to effectively support the automated regression solution.
Collaborate with the release teams to present the version status, highlight newly introduced issues, and explain their implications.

We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team at NVIDIA, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

The System VnV team ensures our complex hardware-software products meet their intended requirements and function correctly before release. Our work plays a crucial role in ensuring quality assurance and mitigating risk with a strong focus on automation, data-driven insights, and cross-functional collaboration with development and hardware teams.

We are looking for a motivated and curious student to support our infrastructure and automation efforts. Youll help develop testing tools, integrate lab test equipment, and explore AI-based insights for smarter test analysis.

You'll be exposed to advanced lab setups, real-time testing systems, and tools that support product release decisions, all while being part of a high-performance engineering culture.

This is an ideal role for a student studying engineering or computer science, eager to gain real-world experience in system validation and automation.

Roles and responsibilities:
Design, develop, and maintain automated test infrastructure.
Develop tools to simulate, validate, and verify complex hardware/software systems.
Develop software interfaces to control and monitor test equipment (e.g., oscilloscopes, power supplies, signal generators, protocol analyzers).
Integrate AI/ML models for test optimization, log analysis, anomaly detection, root cause identification, and system insight.
Create dashboards, reports, and intelligent insights from test data and logs.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.

Roles and responsibilities:
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.

Roles and responsibilities:
Join a team of VLSI frontend design engineers in Chain-Reactions projects.
Define, plan and implement our next chip in Chain-Reactions on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.

We are looking for Physical Design Engineer.

Roles and responsibilities:
Build, maintain, and optimize CAD tools infrastructure supporting both commercial and in-house layout and verification tools (Cadence Virtuoso, Synopsys ICC, Mentor Calibre, etc.).
Develop and automate IC layout flows, including placement, routing, floorplanning, PCells, and tapeout preparation.
Apply advanced software engineering and CAD methodologies to address technical challenges, evaluate architectural and hardware constraints, and deliver scalable automation solutions.
Collaborate with layout, circuit, and verification teams to capture requirements and deploy efficient automation workflows.
Design and implement testing frameworks, regression suites, code review practices and CI/CD pipelines to validate CAD flows, ensure correctness, and improve reliability.
Define, document, and enforce best practices, standards, and procedures; provide technical guidance, training, and support to engineering teams.

We are looking for Emulation & Prototyping Engineer.

Roles and responsibilities:
Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
Map RTL designs to FPGA/emulation platforms.
Develop test environments and infrastructure for HW/SW co-verification.
Support hardware bring-up and software validation on emulation platforms.
Collaborate with verification engineers to run regressions and accelerate debug cycles.
Optimize partitioning, synthesis, and runtime performance on emulation systems.
Work cross-functionally with RTL design, verification, and firmware/software teams.