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We are seeking a highly motivated and experienced ASIC LDPC Team Leader to join our growing engineering team. You will be responsible for leading a team of engineers in the design and development of Application-Specific Integrated Circuits (ASICs) using Low-Density Parity-Check (LDPC) codes for error correction. You will play a key role in defining the technical direction, managing resources, and ensuring the successful delivery of high-performance, low-power ASICs that meet project requirements.

Responsibilities:

Lead and manage a team of ASIC engineers specializing in LDPC code design and implementation.
Define the technical vision for ASIC LDPC development.
Translate customer requirements into detailed technical specifications for ASIC development.
Collaborate with other engineering teams (e.g., algorithms, system, verification, test) to ensure successful chip integration and functionality.
Manage project timelines and resources effectively.
Identify and manage risks associated with ASIC development.
Stay up-to-date on the latest advancements in LDPC code design and ASIC technology.
Mentor and develop the technical skills of team members.
Create and maintain clear and concise documentation.
Communicate effectively with internal and external stakeholders.

The ASIC-IP design and verification group, located in Omer is looking for a top-notch student for a challenging role and participation in the whole cycle of ASIC verification. The group is responsible for the definition, design, verification, and support for all complex IP that build each SOC done for all segments.

The ASIC Group is part of worldwide organization responsible of delivering custom ASIC for NAND based storage application like SSD, USB, SD for various markets such as consumer, automotive and enterprise. The group has all of the ASIC functions internally and working in a full COT mode.
The ASIC-IP design and verification group is responsible for definition, design, verification, and support for all complex IPs that build each SOC done for all segments. Strategic IPs are developed to all areas from retail, iNAND (cell phones and client solution) through Client SSD solution and Enterprise SSD.

As part of the team, you will be part of the global effort to:

Define, design, and document RTL verification environments in System Verilog of complex world wide strategic IPs
Interact closely with architecture teams and all SOC teams
Work and develop under world class ASIC methodology development stages
Significant contribution to design, verification and methodology on making complex IPs and flows
Become a significant person on a growing team