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DRS RADA is a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. As the System Engineer Team Lead in our Aerial Interception Technologies team, you will be the architectural anchor for our next-generation interceptor and tactical UAS program. You will bridge the gap between operational requirements and multidisciplinary engineering execution. This is a foundational role requiring a systems-thinking mindset to navigate strict SWaP-C constraints, manage complex subsystems interfaces, and drive the product from conceptual design through successful field integration and flight testing. Key Responsibilities System Architecture & Design: Lead the definition of the overall system architecture (interceptor, ground control station, and data links). Translate operational needs into high-level System Requirement Documents (SRD) and Subsystem Specifications. SWaP-C Budget Management: Own and track critical system-level budgets including Size, Weight, Power, and Cost (SWaP-C), balancing trade-offs between battery life, propulsion, payload, and structural limits. Interface Control (ICD): Define, document, and manage physical, electrical, and software interfaces between avionics, GNC algorithms, power management, communications, and payloads. Engineering Governance: Lead formal technical milestones and design reviews (SRR, PDR, CDR) with cross-functional teams and external stakeholders. V&V and Integration: Develop the system-level Verification and Validation (V&V) strategy. Write System Test Plans/Descriptions (STP/STD) and spearhead laboratory, Hardware-in-the-Loop (HIL), and open-air flight test campaigns. Vendor & Subcontractor Management: Define technical statements of work (SOW) and preliminary specifications for critical tier-1 suppliers (propulsion, sensors, battery technology).

Imagine what you could do here. , new ideas have a way of becoming extraordinary products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Do you want to join us to help deliver the next groundbreaking Apple products?

As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and run-set development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. You will need to have a deep understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, writing from scratch and/or modify existing ones. Also, you should have worked with Dummy Metal Fill generation and Design for Manufacturability (DFM) rules at different technologies.
Responsibilities
Develop, improve and maintain all aspects of physical verification flow and methodology
Coordinate the effort of validating flows, improving for custom checks and data generation
Work with the design and PD teams to facilitate the chip design process
Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs
Collaborate with tool vendors and foundries for PDK performance enhancements

We are looking for a software engineer with strong backend skills, a product mindset, and the curiosity to bring LLM-powered agents into the toolchains and Linux environments where chips are actually designed. Success in this role means owning the agentic infrastructure end-to-end: from the platform our agents run on, to the integrations that let them safely act inside our customers' existing flows.
Description
You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

* Architect, build, and operate the agentic infrastructure our team relies on:including LLM orchestration, tool-calling layers, multi-agent workflows, and the services that host them.
* Design and implement software solutions for chip design engineers, translating their workflows into reliable, automated agent-driven systems.
* Integrate our agents and services with existing Linux-based environments, in-house tools developed by the team, and third-party EDA tools.
* Manage agentic and ML workflows in production to ensure performance, high availability, and resource efficiency.
* Deploy and maintain production services, with proactive monitoring to catch quality and infrastructure regressions before they reach users.
* Build automated evaluation frameworks to measure retrieval quality, agent execution, and LLM output accuracy across releases.
* Partner with CAD teams to integrate pipelines and agents into CI/CD, ensuring reliable deployments and safe rollbacks.
* Implement access controls, authentication, and secret-handling practices appropriate for working with sensitive design data.
* Collaborate closely with ML engineers, researchers, and our customer teams.

As a Silicon Validation/Emulation Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will be a key contributor in our pre-silicon hardware validation efforts using Cadence Palladium emulation platforms, enabling early system integration and hardware validation. You will work closely with SoC architects, RTL designers, and verification engineers to ensure our designs are thoroughly validated before tape-out. You will help define the processes, methods, and tools for emulation environment development and debug of large complex SoCs.
If you enjoy a fast-paced and ambitious environment, collaborating with people across different functional areas, and thriving during crisis times, we encourage you to apply and join us!
Description
Building and maintaining Palladium emulation environments, including compile flows, netlist preparation, memory modeling, and clock/reset configurations.
System-level debug and root cause analysis of complex hardware issues on the emulation platform.
IP-level debug and validation, working closely with IP owners to isolate and resolve design issues.
Development and implementation of automation aids, flows, and scripts to improve Palladium build efficiency, debug turnaround, and platform utilization.
Performance profiling and optimization of emulation models to maximize execution speed.
Collaboration with multi-disciplinary groups to make sure emulation deliverables are on schedule and support critical program milestones.
Responsibilities
Own and maintain Palladium emulation build flows for SoC and subsystem-level models
Drive debug and triage of emulation model issues, working with RTL designers and verification engineers
Support system-level hardware validation efforts and hardware integration
Develop reusable debug methodologies and collateral to accelerate issue resolution
Optimize emulation model performance through compile tuning, partitioning strategies, and platform configuration
Thoroughly document flows, debug procedures, and best practices
Collaborate with cross-functional teams to define emulation requirements and support prototype hardware validation

We are seeking a highly motivated architect to join our team of experts and take part in shaping the future of high-performance ML / AI computing. Our next-generation Spectrum-X, InfiniBand and NVLink systems will be at the heart of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today. As a system/software architect, you will have the opportunity to work on some of the most innovative technology that is currently driving the world forward.

What youll be doing:

Define the next generations of Spectrum-X, InfiniBand and NVLink SW architecture.

Research of various solutions by defining and running POCs, evaluate SW and HW impact and conveying the solution architecture to the relevant teams. The solutions can span over various layers: from algorithms and high level software to firmware and HW.

Collaborate with multi-functional teams, including other architecture teams, VLSI logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

We are seeking a highly skilled and modern software engineer to develop and prototype brand new advancements in distributed training and inference using our Spectrum-X AI fabric. This role offers a rare chance to pioneer AI and networking technology, contributing to ground-breaking projects that will define the landscape of large-scale AI systems. Improve AI app-networking connection by refining communication, crafting congestion control, coding NIC firmware, and expanding switch SDK features for enhanced AI factory efficiency. Your work impacts large AI system development, scaling, and speed.

What youll be doing:

Prototype end-to-end solutions to improve distributed training and disaggregated inference performance.

Analyze and optimize communication flows across application, transport, and network layers.

Develop system software spanning communication libraries, drivers, and firmware integrations.

Collaborate with hardware, firmware, and SDK teams to co-design network features.

Validate and integrate prototypes into our AI infrastructure and products.

We seek for team lead to join our Ethernet Switch SONiC Network OS. As a SONiC design team lead, you will have to work closely with our development and architecture teams responsible for SONiC Network OS and gain a deep understanding of our products and technologies.

What you'll be doing:

Be part of our SONiC R&D team, contribute code to SONiC worldwide community.

Work in a Continuous Deployment environment of fast development/deployment cycles.

Work with experienced teams which are well known in the SONiC community.

Participate in an international team of software engineers working on products for testing our products.

Manage, mentor, and guide a team of SONiC eth switch NOS.

Design and implement SONiC feature under linux environment upstream to SONiC open source project.

Promote a culture of innovation, quality, and accountability. Bring SONiC NOS to shine in customer's view.

We are looking for a Senior Software Engineer to join our team developing the core technologies behind our SmartNIC platform. Your work will directly impact next-generation AI infrastructure, cloud networking, and high-performance data centers used by customers around the world.

What you'll be doing:

Architect, design, and develop next-generation networking acceleration technologies.

Build and enhance core software components within the DOCA SDK.

Work closely with architects, customers, and engineering teams to understand requirements and deliver scalable, high-performance solutions.

Collaborate across the software stack, including applications, virtualization, drivers, Linux kernel, firmware, and hardware teams.

Drive technical decisions and contribute to the design of performant, maintainable software.

We are looking for a strategic and hands-on Automation Engineer for our Quality Engineering Department to lead the development of cutting-edge automation solutions. This role is pivotal- join us in leading the transformation of our automation strategy and redefine how we build, test and deliver secure software at scale.
We work in a flexible, hybrid model, so you can choose the home-office balance that works best for you.
Key Responsibilities:
Design and implement comprehensive system-level and end-to-end automated test suites that ensure broad and deep coverage across our product ecosystem.
Create automated test frameworks, design and implement test cases, and write code to improve software testability
Develop and execute automated tests across various layers, including API, UI, database, integration, and end-to-end scenarios.
Integrate automated testing into CI/CD pipelines using Azure DevOps, and modern continuous delivery practices.
Work with microservices architectures, cloud environments (primarily Azure), and containerized platforms such as Docker and Kubernetes.
Gain deep knowledge of the platform, its products, components, and cross-product integrations, serving as a quality advocate across the organization.
Drive the adoption and implementation of automation-first and shift-left practices, embedding quality into every stage of the development lifecycle.
Collaborate closely with R&D, DevOps, Project Managers and Product teams to integrate testing into CI/CD pipelines and production environments.

We are seeking an experienced Software Developer to join our IT Business Applications department. This team is responsible for developing and maintaining internal applications that support our business operations. The ideal candidate will have strong expertise in both .NET/C# and Python development, with a proven track record of building scalable cloud-based applications.
What Youll Do:
Lead and participate in the full application lifecycle, from requirements through architecture, development, and monitoring
Design and build scalable backend services and RESTful APIs
Develop clean, maintainable, high-performance code
Contribute to system architecture and cloud-native scalability
Collaborate with cross-functional teams to deliver new features
Apply modern development practices and participate in code reviews
Leverage emerging technologies, including AI tools, to enhance applications

We are looking for a Software Engineer specializing in ML Systems Engineering to join our Development department.
While vision and language models have become increasingly commoditized, our proprietary deep learning models are unique, fast-evolving, and deployed in live trading across the worlds most efficient and sophisticated financial markets. Operating in this environment presents distinct scaling challenges and continuous opportunities for optimization. Success in this role requires first-principles thinking and a deep understanding of the engineering trade-offs behind high-performance DL systems.
This is a pivotal role within our engineering organization. You will work closely with researchers and engineers across the company, running deep learning models on massive compute clusters and adapting them for production serving under strict and non-trivial constraints.

We are looking for an experienced Data Center Operations Engineer to join our IT department. In this role, you will maintain and support a large-scale global server and GPU infrastructure, monitor and troubleshoot hardware failures, and collaborate with senior system specialists to resolve complex issues across production and research environments.
We offer a dynamic, innovative production and research environment and expect a strong commitment to maintaining high service availability, performance, and reliability.
Responsibilities:
Deploy (rack and cable) new servers, GPUs, and infrastructure hardware.
Monitor and troubleshoot IT infrastructure hardware issues across all company data centers.
Coordinate vendor engineers site visits.
Perform hardware break/fix activities including replacement of drives, RAM, CPUs, GPUs, power supplies, and other server components.
Maintain firmware versions up to date.
Manage company data center inventory.
Monitor and manage DC environment parameters including power usage, airflow, cooling, and rack capacity.
Support and keep hardware in an high-performance compute environments used for compute-intensive workloads and research activities.