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We are looking for an experienced and leadership-oriented ATE Software team leader to lead our software ATE development team. In this role, you will manage a team of software engineers, overseeing the design and execution of advanced ATE software for electronic cards and calibration systems used in our cutting-edge AESA radar technology The ideal candidate will combine strong software management skills with a deep understanding of RF systems and hardware-software integration. Key Responsibilities:
* Lead, mentor, and manage a team of ATE software engineers.
* Lead the design and development of automated TEST software for electronic cards and radar calibration.
* Oversee the full software development lifecycle, from requirements definition to deployment on the production line.
* Collaborate closely with Hardware, system, and RF engineers to ensure seamless integration of software with complex testing equipment.
* Drive technical excellence, code quality, and the implementation of best practices within the team.
* Manage project timelines, milestones, and resource allocation to meet delivery goals.

The position is based in Netanya, with occasional travel required to the production facility in Beit She'an.

This challenging role combines development, integration, troubleshooting, verification and validation, automation, and overseeing the development process from start to finish (A2Z).

Job Description:
Perform electrical tests on subsystems and systems during the production and development processes according to test specifications.
Conduct environmental tests (qualification), investigate faults at the component level, and write tests and system specifications (ATP).

We are seeking a hands-on and versatile Manufacturing Engineer with a strong background in electro-mechanical systems to support New Product Introduction (NPI) and provide technical guidance throughout the product lifecycle. This role bridges the gap between design and production, ensuring that manufacturing processes are robust, scalable, and aligned with product requirements. The ideal candidate will be comfortable interpreting complex technical data packages and collaborating with cross-functional teams and suppliers to resolve technical queries.

Job Description
Support NPI activities and collaborate with R&D, Design, and Supply Chain teams to transition products from development to production.
Develop and validate manufacturing processes for new products, including tooling, fixtures, and assembly methods.
Participate in design reviews to ensure manufacturability and cost-effectiveness.
Interpret and clarify engineering drawings, PCBA schematics, BOMs, and specifications for internal teams and external suppliers.
Serve as the primary point of contact for technical questions related to the Technical Data Package (TDP).
Ensure documentation is complete, accurate, and production-ready.
Define and optimize assembly and test processes for electro-mechanical systems.
Support root cause analysis and corrective actions for production issues.
Implement Lean Manufacturing principles and continuous improvement initiatives.
Work closely with Procurement, Quality, and Supplier Engineering teams to ensure alignment on technical requirements.
Support supplier onboarding and technical training as needed.
Collaborate with Design and R&D teams to ensure the manufacturability of new products.

Required Senior Agentic Systems Engineer
Israel - Raanana
We dont limit our challenges. We challenge our limits. Always. Were ambitious. Were game changers. And we play to win. We set the highest standards and execute beyond them. And if youre like us, we can offer you the ultimate career opportunity that will light a fire within you.
So what is the role all about?
The Senior Agentic Systems Engineer is a hands-on engineer who designs, builds, and operates AI-powered tools and workflows for engineering teams.
Were looking for builders who are not only users of AI tools, but can design autonomous agentic systems, optimize model usage, create reusable agents and workflows, and orchestrate complex multi-step work across multiple tools and agents.
Youll be a one-person-army builder: able to understand a problem, define the approach, build the backend, create a simple UI when needed, integrate APIs, connect agents, automate workflows, and deliver working tools quickly.
How will you make an impact?
Build centralized AI-powered tools for engineering teams.
Create and maintain agents, skills, hooks, MCP servers, plugins, and workflow automation.
Design autonomous agentic systems for internal engineering use cases.
Build multi-step AI workflows across code, documentation, Jira, GitHub, CI/CD, and internal systems.
Build tools for PR review support, test generation, documentation updates, spec creation, codebase understanding, and developer productivity.
Learn from local teams and convert successful solutions into reusable centralized assets.
Integrate AI tools with GitHub, Jira, Confluence, CI/CD, internal portals, and engineering systems.
Optimize AI workflows for cost, latency, quality, and reliability.
Apply token economy thinking when designing agents, prompts, MCP usage, RAG flows, and tool integrations.
Contribute to the internal AI marketplace and reusable asset catalog.
Work directly with engineering teams, collect feedback, and iterate quickly.

we are seeking a Lead System Architect to join our system architecture team and help define NR-NEXUS, our next-generation AI inference platform.

Responsibilities

Lead the software architecture and technical roadmap for NR-Nexus
Write system specifications for NR-Nexus product
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Work closely with engineering teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership

We are looking for a Senior Software Engineer to help build and optimize large-scale, high-performance GenAI infrastructure and inference systems on Kubernetes.

As AI workloads increasingly move toward Kubernetes-native infrastructure, we are building systems that support distributed inference, performance optimization, reliability, observability, and production-grade deployment at scale.

This role is ideal for an engineer who can reason deeply about systems, performance, tradeoffs, and reliability, and who is comfortable owning difficult technical decisions end-to-end.

You will work across inference serving, distributed systems, optimization, and Kubernetes-native AI infrastructure.

What Youll Do

Build and optimize high-performance Kubernetes-native GenAI inference systems
Work with modern inference stacks such as vLLM, SGLang, TensorRT-LLM, and related tooling
Work with Kubernetes-native distributed LLM inference frameworks such as llm-d and NVIDIA Dynamo
Design and implement optimization algorithms and performance improvements
Improve reliability, observability, deployment, and operational maturity of AI systems
Make architectural decisions and take ownership of technical outcomes
Collaborate with a small, senior engineering team focused on performance and production quality

AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.

You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.

Responsibilities

Lead the software architecture and technical roadmap for or next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership across firmware, driver, and networking software development

we are looking for a Software Principal Engineer.
Key Responsibilities :
As a Principal Software Engineer, you will:
Design, develop, and own complex software features - from requirements and design through implementation, testing, and long-term support.
Build high-performance datapath software on SPDK, integrating emerging drive, enclosure, and protocol technologies.
Own performance analysis of the storage software data path - including queueing behavior, CPU efficiency, memory usage, PCIe bottlenecks, and latency behavior.
Work closely with architecture, hardware, and software teams on HW/SW interface definition.
Experiment with and integrate emerging AI tools into the development workflow to boost productivity and innovation.
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we are looking for a Software Engineer Technical Leader.
As a Software Engineering Technical Leader, you will drive the technical vision and execution for complex security policy and access solutions that safeguard enterprise networks globally.
You will leverage your deep expertise in systems programming using C, C++, and Java to architect and develop robust, scalable software. By providing technical leadership, you will mentor peers, guide architectural decisions, and foster a culture of innovation and continuous improvement within the team. Your work will directly contribute to mission by ensuring our network access solutions are secure, programmable, and highly reliable. You will also champion software programmability and integrate automation and orchestration practices to streamline development and enhance product performance, ultimately empowering our customers to connect with confidence.

Join the Front-End Design team, at the core of silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab

Come join us and help shape groundbreaking solutions by designing, developing, and testing some of the most complex ASICs in the industry.
What You Will Do:
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
Handle all chip validation aspects, including:
Building validation plans.
Performing EPSV using advanced test and measurement equipment.
Writing tests in Python over device SDK.
Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

we are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the team, which is at the heart of software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.

We are excited to announce that the Cisco Silicon One team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team:
Join the Cisco Silicon One team developing a unified silicon architecture for web-scale and service provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed