לוח משרות דרושים חשמל ואלקטרוניקה בתל אביב יפו, לחיפוש זה נמצאו 535 משרות

Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.

About This Role:
As the Data Center Design Engineer, you will be the primary architect of our companys operational computing environments. You will bridge the gap between heavy infrastructure and high-performance computing by designing the "whitespace"- the critical area where our servers, storage, and network equipment live. Your work is fundamental to our companys mission of aligning the future of computing with the future of the climate; by optimizing power distribution, cooling, and equipment density, you directly enable the scalability and energy efficiency of our sustainable cloud platform.
You will join a bold, collaborative team where you will lead the planning and implementation of high-density layouts and modular infrastructure. The ideal candidate is a technical problem-solver who thrives in the intersection of mechanical, electrical, and network engineering. This is a full-time position designed for an innovative engineer who wants to build the physical foundation of an ethical and sustainable digital world.
What Youll Be Working On:
Whitespace Design & Planning: Architect comprehensive whitespace layouts, including rack placement and aisle configurations, to maximize equipment density while maintaining optimal airflow and accessibility.
Infrastructure Integration: Partner with Electrical and Mechanical teams to seamlessly integrate power delivery and cooling systems into the whitespace, ensuring robust support for high-performance cloud workloads.
Capacity & Growth Modeling: Develop sophisticated 3D models and capacity planning tools to project future utilization, ensuring our data centers remain scalable and redundant (N+1, 2N).
Connectivity Strategy: Coordinate with Network and Cloud teams to design and implement structured cabling and fiber management systems that meet rigorous performance and low-latency requirements.
Cross-Functional Leadership: Participate in design reviews and risk assessments, providing technical guidance to internal stakeholders and external contractors during construction and commissioning phases.
Compliance & Excellence: Enforce industry standards (TIA-942, ASHRAE) and local building codes to ensure every design is safe, compliant, and performs to the highest reliability standards.
Technical Documentation: Produce and maintain high-fidelity CAD/BIM drawings and schematics that serve as the definitive source for operations, maintenance, and auditing.
Continuous Innovation: Evaluate emerging modular technologies and design methodologies to relentlessly improve energy efficiency and site performance.

We are looking for an experienced Senior System Integration Engineer to join our team.

The role involves planning and executing system integration activities across multiple subsystems, from development through production. You will work with complex systems combining software, computing, IP networks, communications, RF, navigation & control, algorithms, and computer vision.

Responsibilities
System operation and troubleshooting, planning and executing integration processes, writing integration test specifications, preparing performance validation tests, and analyzing system behavior and performance.

We are looking for a Hardware Team Lead to own our electrical hardware from the first rough prototype all the way to a product that holds up in the field. You will lead a team of hardware engineers who work across most of what we build: board design and hands-on investigation, ultra-sensitive sensors, power circuits for our transmitters, RF and noise-sensitive systems, high-speed digital and communication, ADCs, DACs, and more.
We move fast, and that is a big part of the fun here. Quick prototypes and rough bring-ups are how we learn. Your job is to keep that speed, but make sure that when something proves itself it stops being a prototype and becomes real engineered hardware: reviewed, testable, documented, and built to be manufactured. You set the engineering bar, make the calls on design, and own the work we send to external design houses and suppliers, so that outsourced never means unowned.

We are looking for a Systems Engineer to take ownership of complex multidisciplinary systems from early definition through integration, validation, and field deployment.
In this role, you will bridge hardware, software, algorithms, sensing, and mechanical engineering, ensuring that every part of the system works together to deliver reliable performance in real-world environments. This is a hands-on position that combines technical depth with a broad system perspective, where you will work closely with a small, experienced team to solve challenging engineering problems and drive innovative

We are a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc). The company offers an award-winning disruptive solution; a sensor free approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art Machine Learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
We are looking for a talented, self-driven, and hands-on Electro Optics Systems Engineer to join Photonics R&D team. In this role, you will develop and advance next-generation distributed fiber-optic acoustic sensing (DAS) systems, combining electro-optic system design, performance modeling, simulations, experimental validation, and field data analysis. You will tackle complex physical and engineering challenges, contribute to next-generation product development, and collaborate closely with multidisciplinary teams to bring innovative sensing technologies from concept to real-world deployment. This role is ideal for someone who thrives in a fast-paced, hands-on R&D environment, enjoys working across disciplines, and wants to see their work translate into real-world impact.
What Youll Do:
* Lead experimental and theoretical R&D efforts for the development of Prismas next-generation distributed fiber-optic acoustic sensing systems.
* Design, evaluate, and optimize electro-optic interrogation systems for distributed acoustic sensing applications.
* Develop system -level models and simulations for optical signal generation, fiber propagation, coherent detection, system noise, SNR, and sensing performance.
* Build software tools and simulations in Python, C ++, or similar languages for system evaluation, signal processing, field data analysis, and performance modeling.
* Plan, execute, and analyze laboratory and field experiments to validate system performance and support product development.
* Gain unique end-to-end expertise across the full sensing system pipeline, spanning fiber optics, electro-optics, coherent detection, DSP algorithms, and advanced data analysis.
* Lead product development activities from ideation and proof of concept through design, qualification, validation, and deployment.
* Collaborate closely with multidisciplinary R&D teams, including physicists, software engineers, algorithm developers, and hardware engineers.
* Communicate effectively with both technical and non-technical stakeholders, translating complex system behavior into clear insights and actionable recommendations.

a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a sensor free approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art Machine Learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly. We are looking for a talented, self-driven, and hands-on DSP Researcher to join our Photonics R&D team. In this role, you will research and develop next-generation distributed fiber-optic sensing technologies, focusing on signal processing, system modeling, simulations, and experimental validation. Working at the intersection of physics, electro-optics, fiber-optic sensing, and DSP, you will transform complex physical phenomena into robust sensing solutions for real-world applications. You will tackle challenging physical and algorithmic problems, contribute to cutting-edge sensing products, and collaborate closely with multidisciplinary R&D teams. This role is ideal for someone who thrives in a fast-paced environment, enjoys working across disciplines, and is excited to take ideas from research and lab validation to large-scale deployment.
 
What Youll Do:
* Conduct experimental and theoretical R&D for next-generation distributed fiber-optic acoustic sensing systems.
* Develop, implement, and validate DSP algorithms for coherent optical sensing systems.
* Build end-to-end expertise across the full sensing pipeline, including optical signal generation and propagation, coherent detection, signal acquisition, DSP, and advanced data analysis.
* Design and run laboratory experiments to validate new concepts, improve system performance, and support current and future product generations.
* Develop simulations, models, and analysis tools using Python and/or C ++ for lab experiments, field data analysis, signal processing, and system -level performance evaluation.
* Work with field experiment data to identify performance gaps, validate models, and improve sensing capabilities.
* Collaborate with R&D teams across disciplines to develop, validate, and integrate new sensing capabilities.
* Communicate complex technical concepts clearly to both technical and non-technical stakeholders.

Design high-performance analog and RF ICs optimized for precision, power, and area, driving prototype and product iterations from architecture to silicon validation.

Responsibilities
Design and simulate analog and RF integrated circuits, including critical blocks such as amplifiers, mixers, PLLs, ADCs, DACs, and bias/reference circuits, with a focus on signal integrity, linearity, and precision.

Optimize circuits for power, area, and performance trade-offs, ensuring designs meet system-level requirements across process, voltage, and temperature (PVT) variations.

Collaborate closely with optics, simulation and PCB teams to define architecture and block-level specifications for successive prototypes and product iterations, ensuring tight alignment with overall performance and integration goals.

Work with layout engineers to guide floor-planning and physical design, minimizing parasitic effects and preserving analog precision in layout-sensitive blocks.

Support post-silicon validation and bring-up, defining test plans, analyzing lab measurements, and correlating results with simulation to refine future design iterations.

Language: English at a proficient level. French is a plus.

As a Digital Backend Design Engineer, you will be responsible for the physical implementation of digital designs from RTL to GDSII, leveraging cutting-edge EDA tools and methodologies. You will collaborate closely with RTL design, DFT, and packaging teams to achieve optimal performance, power, and area (PPA), while meeting stringent timing and yield targets.

Responsibilities
Execute full-chip and block-level physical design tasks including floorplanning, placement, clock tree synthesis, routing, and physical verification.

Develop and optimize the digital backend flow.

Drive timing closure, power optimization, and physical verification (LVS/DRC/ERC).

Collaborate with front-end designers to address timing and logical/physical interface issues.

Support tapeout preparation and final signoff processes.

Play a critical role in ensuring the functional integrity, performance, and reliability of next-generation optical chips.

Responsibilities
Develop robust verification plans for complex digital and mixed-signal optical chip designs.

Collaborate closely with architects, designers, and customers to understand logic requirements, translate them into verification strategies, and deliver clear, actionable feedback throughout the development process.

Perform netlist-level simulations with SDF back-annotation for timing-accurate verification

Support FPGA/ASIC bring-up and post-silicon validation as needed

Develop, maintain, and optimize testbenches and verification components using advanced SystemVerilog features, such as constrained random testing, assertions, and transaction-level modeling, to create robust coverage-driven environments.

Design scalable, reusable UVM-based environments and components (e.g., agents, monitors, scoreboards) for block- and system-level verification. Employ UVM to achieve regression automation, functional coverage closure, and high bug-detection efficiency.

Develop and execute verification strategies for digital blocks implementing or interfacing with PCI Express (PCIe). Apply protocol-checking, compliance validation, error injection, and debug skills for PCIe endpoints and root complex devices. Use protocol analyzers and simulation environments to validate correct implementation across all protocol layers.

Participate in the verification of RISC-V CPU cores and subsystems. Create test plans targeting processor modules (ALU, decoder, register file, control logic), with reference model comparisons, signature checks, and coverage of edge-case scenarios. Leverage formal verification and compliance suites for thorough design validation.

Plan and perform end-to-end ASIC verification, from block-level testbenches to full-chip integration. Execute functional and regression tests, formal verification, and coverage analysis. Debug and resolve design issues, ensuring pre-silicon reliability before manufacturing. Engage in design reviews and system-level protocol validation with cross-functional teams.

Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface custom tensor unit for advanced AI/ML applications.

Responsibilities
Design, implement, and verify RTL blocks for memory, control, and compute subsystems within custom multiphysics computation unit.

Collaborate with system software and architecture teams to define block-level specifications and ensure alignment with performance and integration goals.

Develop and maintain functional verification infrastructure to validate design correctness across simulation and hardware testbenches.

Support synthesis, timing analysis, and backend integration, working closely with physical design and CAD engineers.

Contribute to architectural exploration and hardware-software co-design efforts to shape future iterations of compute platform.