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Our Data Science team is seeking a Junior Data Scientist to help build and improve the models at the core of Mizes travel data platform.
What youll do:
Develop and improve ML models
Build LLM-based pipelines for data enrichment, validation and quality checks
Analyze large datasets to find patterns, data-quality issues and opportunities for business impact
Design experiments, define metrics and evaluate model performance in production
Turn findings into clear insights and recommendations for technical and business stakeholders

We are looking for some exceptional talent to join our R&D team as a System Engineer.
Your Day to Day:
Translation of Product Requirements to System Requirements
Definition of detailed requirements for sub-systems in a variety of domains (SW, Algo, HW, Electro-optics, Image sensor, Lasers, FW, mechanics, thermal)
Hands-on work with all groups in R&D, Product, PM, Quality, and Operations to ensure compliance with all system requirements
Plan and design system integration test scenarios and V&V process
Research and analysis of system limitations for coming up with the best-performing product
Lead risk management and DFMEA processes

We are looking for some exceptional talent to join our Innovation team as an Applied Physics & EO Researcher.
Your Day to Day:
Ownership of complex experimental systems and meeting challenging targets under tight deadlines
Lead and contribute to multidisciplinary research projects across advanced technologies and emerging domains
Design, execute, and analyze experiments, simulations, and proof-of-concept studies
Translate theoretical physics concepts into scalable, real-world applications
Collaborate closely with engineering, product, and cross-functional teams to drive innovation
Stay at the forefront of scientific and technological advancements and identify opportunities for integration
Present research findings clearly to both technical and non-technical stakeholders

We are looking for a Principal Algorithm Developer with experience in NLP and LLMs, who is a highly motivated, collaborative, and results-driven individual who can work both independently and as part of a multidisciplinary team. The ideal candidate has a strong can-do attitude, excellent problem-solving skills, leadership skills, and a passion for leveraging AI to solve meaningful challenges in text analysis in the medical domain.

As part of the AI team you will:

Design, develop, implement, and evaluate robust, scalable AI algorithms and agentic workflows & infrastructure, tailored to real-world challenges in clinical settings.

Prepare, process, and analyze complex medical data to support algorithm development and validation.

Ensure the reliability, performance, and accuracy of algorithms in production, including troubleshooting, testing, monitoring, and continuous improvement.

Collaborate closely with Product Managers and Clinical Specialists to translate clinical and business needs into data-driven solutions.

Research, develop and integrate Large Language Models (LLMs) to extract insights from medical texts and develop intelligent agents for optimized clinical decision support.

Lead development and drive technical decisions that impact your technical domain and related systems across the organization.

Mentor and develop algorithm developers through technical guidance & design reviews.

Stay up to date with cutting-edge advancements in GenAI, LLMs, and Deep Learning.

Organize and actively participate in seminars, book clubs, and conferences.

We are looking for an experienced Applied AI/ML Scientist with expertise in building agentic systems and autonomous agents to join one of our R&D. You will be at the core of transforming our supply chain solutions into a fully agentic platform, designing and building agents that autonomously generate analytical pipelines, orchestrate multi-step reasoning, and resolve complex logistics challenges for our customers. You will combine strong machine learning and deep learning expertise with the ability to architect and implement production-grade agentic systems, working closely with engineering, product, and domain experts to push the boundaries of what autonomous AI can do in supply chain.
Responsibilities:
Design and build autonomous agentic systems that generate, configure, and execute analytical pipelines to solve supply chain challenges end-to-end
Architect multi-agent workflows with planning, tool use, memory, and feedback loops, enabling agents to reason, adapt, and improve over time
Develop and integrate ML and deep learning models (e.g., predictive models, anomaly detection, demand forecasting) as core capabilities within agentic pipelines
Research and apply state-of-the-art techniques in agentic AI, LLM orchestration, and multi-agent systems to production use cases
Translate complex logistics and supply chain challenges into agent-based problem formulations, collaborating closely with product and domain experts
Define and implement rigorous evaluation frameworks for agent performance: correctness, reliability, robustness, and edge-case handling
Collaborate with software engineers to productize agentic solutions - including testing, monitoring, versioning, and iterative improvement
Contribute to team practices: reproducible code, experiment tracking, documentation, and knowledge sharing

we are looking for a we are looking for a
As an AI Algorithm Engineer , youll design and implement advanced algorithmic workflows that power our data digestion pipelines and conversational AI agent experience. You will:
Architect and build workflows that turn raw, unstructured data (e.g., PDF documents and ultra high-resolution architectural drawings) into meaningful, structured context for downstream analysis.
Combine techniques from classical NLP, computer vision, unsupervised learning, and graph theory to build robust end-to-end pipelines - not just standard LLM API calls, but intelligent decomposition, structuring, and context engineering.
Develop AI agent workflows that let customers explore, query, and reason about their data naturally and reliably.
Build strong evaluation infrastructure to benchmark and continuously improve both classical algorithmic components and LLM-based workflows.
Work primarily in Python, and collaborate across systems and services in TypeScript when needed.
Move fast from prototype to production, while maintaining correctness, scalability, and measurable quality.

Develop the optimization and computational-geometry algorithms at the core of us: for researchers who love hard, non-convex problems.

Required Senior DDR Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing. You will verify digital designs, collaborate closely with colleagues on projects, and perform direct validation. You will construct testbenches that exercise hardware through corner-cases and expose bugs. You will manage the full life-cycle from planning and execution to closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required Emulation Verification Tech Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Lead, plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

As a quantum researcher, your main role will be to develop algorithmic and error-reduction tools to help our partners and customers achieve quantum advantage for their applications. You will develop our error reduction methods, including mitigation and correction, and apply them to different use cases by optimizing existing methods, developing new algorithms, and adapting these tools to the realities of running on quantum hardware. This includes taking into account application requirements, noise characteristics, device constraints, and performance on real quantum devices.

Responsibilities
Developing new error reduction methods, including mitigation and correction, for quantum algorithms.
Optimizing error reduction methods for different algorithms, applications, and hardware settings.
Developing new quantum algorithms to enhance performance on real quantum hardware with error mitigation.
Conducting research on applications of quantum computing with our partners, including implementing and running proof-of-concept demonstrations of these applications on real quantum hardware. 

Required Junior AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will join a high-performing Research and Development team dedicated to delivering high-quality silicon. You will partner with cross-functional technical teams throughout the full development lifecycle, taking ownership of quality assurance strategies from the initial concept through final tape-out.
Responsibilities
Plan digital design block verification by analyzing specifications and identifying critical scenarios with design engineers.
Create and enhance constrained-random environments using SystemVerilog and Universal Verification Methodology (UVM), or execute formal verification using SystemVerilog Assertions (SVA) and industry-leading tools.
Identify and write all types of coverage measures for corner-cases.
Debug test failures alongside design teams to ensure block correctness.
Analyze metrics to resolve coverage gaps and drive progress toward tape-out.

Required Senior Verification Engineer, Digital Signal Processing, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you own the verification strategy for high-speed Physical Layer (PHY). You aren't just looking for RTL bugs, you are looking for system-level failures. You will lead the effort to verify how the digital DSP interacts with the analog front-end.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the verification strategy for high-speed PHYs (112G/224G), defining the test plan for top-level integration and mixed-signal boundaries.
Architect and implement mixed-signal verification flows using Real Number Modeling (RNM) or SystemVerilog-AMS to verify the interaction between Analog Front Ends (AFE) and digital DSP.
Design specialized testbenches to verify the stability, convergence time, and tracking capabilities of adaptive algorithms (e.g., LMS, Zero-Forcing) across Process, Voltage, Temperature (PVT) corners.
Develop tests that simulate real-world data center conditions, including link bring-up, auto-negotiation, and error-recovery protocols.
Act as the primary verification interface for the Signal integrity and Power Integrity (SI/PI) and Analog teams, ensuring that physical channel impairments (loss, crosstalk, reflections) are accurately reflected in the Design Verification (DV) environment.

Required ASIC Design Verification Engineer, Digital Signal Processing
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will define and execute the verification strategy for high-speed Physical Layer (PHY) digital blocks. This role focuses on the functional and mathematical verification of complex DSP algorithms, digital-analog boundaries, and signal processing logic. This position requires a strong technical foundation in communication theory, fixed-point arithmetic, and mixed-signal co-simulation.
Responsibilities
Verify RTL implementations against high-level architectural reference models (MATLAB, C++, or SystemC) using bit-exact and fixed-point verification methodologies.
Verify the stability, tracking capability, and convergence of adaptive equalization loops (FFE, DFE) and timing recovery systems under varying channel impairments.
Model and verify the functional interface between Digital DSP blocks and the Analog Front End (AFE) using Real Number Modeling (RNM) or SystemVerilog-AMS.
Design, implement, and maintain scalable UVM-based simulation environments, SystemVerilog Assertions (SVA), and functional coverage metrics for digital signal processing blocks.