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We are looking for an outstanding Senior Networking Software Architect to join the NIC/DPU Software and Firmware Architecture group. In this role, you will help define the next generation of our datacenter and AI networking platforms, with focus on DPU management, QoS, performance, telemetry, and software architecture across stacks. You will work closely with hardware designers, firmware/kernel driver teams, system engineers, validation, product management and customers. The role spans early architecture definition, pre-silicon design, bring-up, and production readiness for large-scale AI and cloud datacenter deployments.

What Youll Be Doing:

Own software and system architecture for next-generation DPU management, QoS, performance, telemetry, and observability features.

Define end-to-end control and management flows across DOCA, host drivers, embedded firmware, BMC, management controllers and external management systems.

Specify telemetry and observability requirements, including counters, logs, traces, events, health monitoring, debug data, and streaming telemetry.

Define management interfaces and APIs for configuration, provisioning, lifecycle operations, diagnostics, and field serviceability.

Write clear architecture specifications, interface definitions, flow diagrams, and design documents for software, firmware, and system teams.

Partner with R&D teams to translate high-level architecture into implementable designs and guide features through development, validation, silicon bring-up, and production.

Analyze system performance bottlenecks, interoperability issues, telemetry gaps, and customer-reported issues, then feed learnings into future architecture.

Collaborate with system and cluster architects to ensure NIC/DPU features fit end-to-end AI datacenter and cloud networking designs.

Join us, the industry leader in high-speed communication devices, as a Physical Design Engineer in our Networking Silicon engineering team. You will develop innovative chips with outstanding efficiency and minimal latency. This opportunity lets you be part of a team leading modern technology, where your contributions will have a meaningful impact in a dynamic and inventive environment. We value collaboration, inclusion, and excellence, ensuring our technology remains world-class and our team members are supported to succeed.

What you'll be doing:

Engaging in the physical build of blocks according to specifications under challenging constraints, targeting efficient power, area, and performance.

Working on a variety of exciting builds, resolving complex timing and congestion issues with precision.

Engaging in all facets of physical chip build development (RTL2GDS), including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Contributing to flow development to improve and innovate our processes.

Collaborating with a team of outstanding engineers to achieve flawless integration and implementation of builds.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

We are looking for a Staff QA Architect to join our elite team, contributing to the development of one of our strategic products for Cloud Security.
In your role, you will be responsible for developing and maintaining high-quality work procedures, leading the team to achieve better quality.
You will be involved in the full feature lifecycle - from gathering requirements with the product team to release - ensuring quality at every stage, including bug management and observability and defining QA work procedures, guidelines, and designing the entire testing process.
The ideal candidate will be responsible for leading quality activities across solution-level features, ensuring the highest standards of quality are met. This role requires a proactive individual with excellent leadership and communication skills, capable of driving quality initiatives and fostering a quality-focused mindset within the organization.
Comprehensive understanding of the product's functionality, target use cases, and the value it delivers to customers.
Lead the quality efforts across multiple interfaces with a proactive and assertive approach, serving as the key point of contact for all quality-related matters.
Define, implement, and manage QA processes, promoting a quality-driven culture and managing the quality backlog.
Define the overall testing strategy and tooling stack across integration, regression, and load/performance testing.
Drive an automation-first approach - collaborating with developers to ensure code is testable and observable.
Lead root-cause analysis for escaped bugs and define improvement actions.
Own CI quality metrics and dashboards (e.g., build stability, test flakiness, regression coverage).
Influence decisions regarding test environments, mocks, test data, and production parity.
Collaborate with the centralized quality group to ensure E2E test coverage.
Quality Point of Contact: Serve as the primary point of contact for quality-related matters concerning the unit or the cross-group feature.

Were building foundational infrastructure to secure AI agents - including their identities, access patterns, and interactions with sensitive systems and data. This includes designing intelligent, dynamic mechanisms for ephemeral access control, secrets management, and agent/user identity tailored to the modern agent ecosystem.
Youll help define how agents (both machine and human-facing) authenticate, obtain scoped access, perform actions securely, and leave a verifiable audit trail.
This is a unique opportunity to be part of a start-up inside the company - building the platform from scratch at one of the most cutting-edge intersections of AI, identity, and security.
Responsibilities:
Own the design and development of secure, scalable services that enable AI agents to manage their identities, secrets, and access - directly protecting critical systems and data.
Take charge of agent authentication flows and real-time access policies, ensuring seamless, reliable just-in-time, least-privilege access.
Lead the evolution of MCPs and agentic AI, transforming innovative ideas into systems that define how intelligent agents operate at scale.
Collaborate with architects and engineers to shape and deliver high-performance platform components you can take pride in.
Write clean, maintainable, and scalable code that powers some of the worlds largest and most security-conscious companies.
Drive cross-functional efforts with platform, AI, and security teams to gather requirements, influence design decisions, and bring impactful solutions to life.

We are looking for a Senior Chip Design Verification Engineer to join our Network Adapter Silicon group. As a Senior Verification Engineer Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops core units within the Networking silicon.

Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, FW and Post-Silicon validation.

We are seeking a Director of Software Architecture to lead and accelerate the evolution of next-generation AI data center and networking technologies. This role is designed for a hands-on, execution-driven leader who pushes boundaries, translates vision into reality, and delivers high-impact solutions at scale. You will operate at the intersection of innovation, architecture, and delivery-shaping the future of AI networking and infrastructure.

What you will be doing:
Drive identification, evaluation, and rapid adoption of emerging technologies, ensuring strong alignment with strategic roadmap and measurable business outcomes.
Lead the design and delivery of advanced networking applications, leveraging data plane programming and modern networking protocols to solve complex, large-scale challenges.
Architect solutions across AI data center environments, integrating GPU-based systems, hardware acceleration, and high-performance networking.
Act as a thought leader and industry influencer-engaging directly with customers, publishing technical content, and representing us at key conferences and forums.
Define and execute a bold architectural vision for our networking in close collaboration with cross-functional software and hardware leaders.

Sigmabit is looking for a Real-Time Embedded Software Developer to join our innovative real-time software team in Beer Sheva and take part in the development of cutting-edge products in the cyber and navigation domains.
This is an opportunity to work on advanced real-time systems, influence core product architecture, and be part of a multidisciplinary environment developing mission-critical technologies.
In this role you will:
Define, design, and develop real-time embedded software for advanced cyber and navigation systems
Lead development activities for cutting-edge projects in a multidisciplinary environment
Develop robust, production-grade software while solving complex software and system challenges
Work closely with hardware, system, and software teams to deliver high-quality solutions
Take part in defining development methodologies, workflows, and engineering best practices
Participate in selecting tools and technologies to optimize team collaboration and productivity
Integrate advanced communication, networking, and hardware-driven capabilities into real-time systems.

We seeks a highly motivated senior AI cloud Software architect to join our team in Israel. Work on innovative technologies shaping the future of AI and cloud. We are developing RDMA Transport protocols within the Networking software architecture team. Efficient and fast communication between GPUs directly impacts end-to-end application performance. This impact continues to grow with the increasing scale of next generation systems. This is an outstanding opportunity to advance the state-of-the-art, break performance barriers, and deliver platforms the world has never seen before. Are you ready to build the new and innovative technologies that will help realize our vision?

What you'll be doing:

Translate requirements into vision, architecture, and roadmap.

Design infrastructure to support programmable improvements to RDMA protocols for E/W AI networking stack.

Collaborate with multi-functional teams to innovate and deliver networking solutions.

Explore innovative solutions in HW and SW for our next-generation platforms as part of programmable RDMA architecture.

Build proofs-of-concept, conduct experiments, and perform quantitative modeling to evaluate and drive new innovations.