דרושים » הנדסה » Inertial navigation developer

Requirements:
Mandatory:
6+ years of experience as a software or system engineer in the field of Wi-Fi
B.Sc./M.Sc. in Computer Science, Computer Engineering, Electrical Engineering or other related field
System view and profound understanding of 802.11 protocol and Wi-Fi MAC layer
Hands-on C & C++ experience
Team player with good interpersonal and communications skills
Self-motivated and able to work independently
Advantage:
Hands-on Python experience
Experience in Linux based development environment
Knowledge or experience with network simulation tools (ns-3, OPNET Modeler etc.)
Experience with design / development of 802.11 performance oriented algorithms (e.g. high throughput, low latency, low jitter, rate selection)
Good understanding of 802.11 PHY and MAC/PHY interfaces
Good understanding and experience with IP and IP protocols (TCP, UDP, QUIC etc.).

Requirements:
PhD or MSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 15 years of relevant research and development experience in industry and academia in the following areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Workload characterization and analytical model generation
- System Modelling and emulation of HW
- Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Excellent oral ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Excellent oral and written English. written English.

Requirements:
B.Sc. in Electrical Engineering (or equivalent academic degree)
10+ years in VLSI design (less can be accepted in case of a unique candidate).
At least 5 years as Architect.
Ability to make trade-offs between power, performance, and area appropriately to meet the requirements of the product.
Experience with AI - Mandatory.
Advantages:
Experience with High level design languages like System-c an advantage.
Hardware accelerator development.

Requirements:
BSc or higher degree in Computer Science (or equivalent degree)
3+ years of experience in software development in C
Proven open source software contribution experience to relevant projects (OvS, DPDK, Linux Kernel, etc.)
Knowledge/experience with Linux kernel upstream processes and release cycle
Solid background with git
Demonstrated experience with operating system kernel patching and debugging
Well-organized and excellent communication and inter-personal skills
Strong commitment to quality processes and documentation standards
Demonstrated ability to present oneself in a professional manner when interacting with colleagues, business partners, and the open source community
Ways to stand out from the crowd:
Broad knowledge of the Linux kernel and kernel subsystems, networking stacks in particular
Extensive experience with network acceleration solutions: TCP/IP Optimization, RoCE/RDMA, DPDK, eBPF, etc.
Significant experience in network virtualization (hypervisor, VM switching, etc.)
Hands on experience with SmartNics driver development.

Requirements:
Bachelor's degree in computer science, computer engineering or a related field
Hands on experience on Networking L2-L4
Knowledge of Linux system operation
Experience in Virtualization such as VMware OS
Fluent level in Hebrew and English
Advantage:

Familiarity with MySQL
Knowledge of Mongo DB
Experience with Bash, Java script programming languages
Knowledge of Jmeter (L7) / Trex
If you would like to apply to this position, please send us your resume in English.

Requirements:
REQUIERD
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
You hold a PhD or Master degree in the field of power electronics, electrical and electronic engineering or in a similar background in Research & Development
Profound R&D experience in the field of power electronics
Deep expertise in power electronic converter topologies, modulation, control and algorithm development, more focusing on system and hardware design
Good theoretical understanding of basic power electronic converter principles and multi-level converters, magnetic component designs, power semiconductor devices such as wide band gap devices, and power converter modulation & control
Proven experience with new technology development initiatives and innovation as well as publications in reputed journals
High level of self-reliance and an autonomous target-oriented work style, can do attitude, eager to learn new things and ready to think outside the box
Occasional travel related to ongoing projects, seminars, conferences etc.
Fluent in written and spoken English, willingness to learn German, additional languages are a plus.

Requirements:
BSc or MSc in electric engineering or computer engineering, with 5-7 years of field experience
Knowledge of Verilog
DFE and filtering experience
Big thinker, team player, and highly motivated
Multi-disciplinary, independent learner, curious engineer
Nice to have

Familiarity with 4G/5G standards
Knowledge of various decoder architectures
Background in wireless communication protocols and very low-power design
Knowledge in Specman and scripting languages
Knowledge in Matlab

Requirements:
BSc in electrical or computer engineering/computer science from an established university
At least 6 years experience in the verification flow of complex designs from test plan definition to coverage closure
Understanding of high-level system flows and constraints
Team player with a proactive attitude
Independent thinker, curious, and motivated
Experience in Specman and/or System Verilog must
Nice to have

Experience in UVM
Background in System-On-Chip flows and on-chip interconnect protocols.

Requirements:
REQIRED
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.