דרושים » הנדסה » Senior VLSI Architect

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
MINIMAL REQUIREMENTS:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
Ownership of the overall verification methodology for a CPU project.
REQUIREMENTS
MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Minimum of 10 years of proven design experience in complex processor projects.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to US, Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
REQUIERD
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Good understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store units, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory controller.
Good understanding of high speed digital VLSI design flow and methodology
Understanding of trade-offs between power, performance and area appropriately to meet the requirements of the product.
At least 6 years of experience in one of the leading CPU companies
Familiarity with the ARM\IA architecture and the micro-architecture for current ARM\IA CPU cores.
Software development (C, assembly).
Hands on experience as a Front end ASIC designer
DESIRED
Co-operate and communicate well with the architecture team and other members of the development.
Excellent verbal and written communication skills.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
REQIRED
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Solid understanding of general purpose CPU micro-architecture, including load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems, memory technologies and memory controllers.
Ability to make trade-offs between power, performance and area to meet the requirements of the product.
Hand-on experience with high power-efficient CPU on chip interconnect, coherent fabric, memory controllers.
At least 8 years experience in architecture in one of the leading CPU companies
Experience modeling microprocessors using higher-level languages, like C/C++.
DESIRED
Co-operate and communicate well with the architecture and design teams.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.

Requirements:
5+ years of hands-on experience in ASIC design flow
Solid background in design micro-architecture
Experience in ASIC design front end flows, such as Lint, CDC, RDC
Experience in bus-fabrics and low power design is a plus
Self-starter, highly motivated, highly organized, and schedule-driven
Education & Experience
BSc or MSC in Electrical Engineering or Computer Engineering

Requirements:
You're the right fit if you have:
Bachelor's degree in Electrical Engineering.
A minimum of 10 years of experience in FPGA design in a multidisciplinary industry.
Strong understanding of digital design concepts, clock domains, timing closure, and power optimization.
Ability to create clear and concise design documentation, including design specifications, test plans, and implementation details.
Board design experience and good understanding in schematic, PCB layout, signal integrity analysis, and knowledge of industry standards such as DDR,etc.
In-depth knowledge of FPGA architectures from vendors like Xilinx, Intel (formerly Altera) and signal processing algorithms and techniques for implementing functions efficiently on FPGAs.
Knowledge and experience with high-speed serial interfaces (such as: Ethernet, DDR) and protocols like AXI.
Ability to design and integrate FPGA design into larger systems including interfacing with other hardware components and microprocessors and HW-SW interfaces.
Knowledge and experience in tools/mythologies such as Vivado, Quartus, UVM, and implementation, testing and debugging methods.
Mastery of HDLs like Verilog or VHDL for designing and implementing complex FPGA designs and architectures.
Proficient in debugging techniques and tools for identifying and resolving issues in FPGA designs.
Strong communication skills to effectively collaborate with cross-functional teams including hardware engineers, software engineers, and system engineers.

Requirements:
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.
Preferred Minimum Qualifications:
* 2-7 years of significant logic design engineering experience.
* Knowledge in digital design domain, preferably from the field of ASIC design front end activities.

* Hands on experience in micro-architecture definition from specification, RTL development and debug.

Preferred Qualifications:
* Experience in RTL implementation in image processing domain (pixel processing, filters, convolution)

* Experience in scalable design implementation (definition and coding)

* Experience in digital design tools for the following flows: simulation, dynamic verification, synthesis, linting, timing analysis and formal verification.
* Ability to work in a team.
* Ability to understand system wise aspects like interaction of HW with SW and FW

Requirements:
MINIMAL REQUIREMENTS
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Good understanding of CPU design methodology
Excellent verbal and written communication skills.
CPU related Experience in one of the leading CPU companies or in academia.
Willing to relocate to China for extended period.
REQUIREMENTS
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience modeling microprocessors using higher-level languages, like C/C++.

Requirements:
MINIMAL REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Solid understanding in SoC parts (DDR, L3 cache, GPU .)
Proven experience of owning whole SoC units/architecture
Good understanding of SW (e.g. C, C++)
Ability to make tradeoffs between power size and performance
REQUIREMENTS
At least 15 years of hands on experience as RTL/Architect of complicated SoCs
Excellent Verbal and written communication skills
Co-operate and communicate well with different groups from different countries.
Advantage:
Familiar with Core Architecture
Familiar with CPU SoC Architecture
Familiar with Mobile devices
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Experience in modelling SoC using high-level language.

Requirements:
PhD or MSc in computer science/EE or area related to computer architecture, or equivalent research experience in industry
At least 15 years of relevant research and development experience in industry and academia in the following areas:
- Computer architectures: instruction set architecture, microarchitecture, cache sub-system, memory sub-system, NOC, interconnect
- Workload characterization and analytical model generation
- System Modelling and emulation of HW
- Simulation of Software workloads and Software applications on HW simulator
Ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Experience working with highly technical teams and communicating to non-technical partners
Excellent oral ability to provide innovation and an international vision
Excellent communication, presentation and reporting skills
Excellent oral and written English. written English.