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נאספה מאתר אינטרנט
16/04/2024
Job Type: Full Time
We are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

We are building a new group in Israel, this group will deliver security engines and risc-V processor IPs to all of our product lines working with all our groups around the world. We are looking for inquisitive, motivated engineers with experience to build this group from the ground up. As a senior member of our design team, you will be responsible for the design and implementation of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.

What you will be doing:
Participate in micro-architecture development and document specifications.

Implement in RTL and/or work on the verification team to ensure that the design is functional.

Apply logic design skills to optimize and meet performance and power goals.

Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
What we need to see:

A Bachelors degree in electrical engineering or computer engineering.

5+ years of relevant experience in chip design development of complex designs.

Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.

Good interpersonal skills. And team player.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

3+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design or Verification experience.

Experience in developing sophisticated design blocks.

Integration of design elements to large cluster or full-chip.

Experience in working with back-end on area, power and timing closures.

Scripting ability.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
01/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
What we need to see:

BSc. in Electrical Engineering or Computer engineering, or equivalent experience.

5+ years of practical verification experience.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Experience with Specman is a plus.

Good understanding of RTL design (Verilog).

Strong debugging, problem solving and analytical skills.

Excellent communication and social skills.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.
This position is open to all candidates.
 
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 5 years of experience

Should be a power user of synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus) with 5+ years of experience.

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analyzing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modeling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Great teammate, ownership, self-learning skills, and ability to work autonomously.

Ways to stand out from the crowd:

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
27/03/2024
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join Tel Aviv group, working on designing and verifying the new generation of high-speed ports.

Design and verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area, and performance.

Daily work might involve any or all aspects of chip development: Verification, Design, and Micro-Architecture.

Work closely with Firmware and other groups around the globe.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Communication Engineering/Computer Engineering.

3+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design). Less experienced engineers with high university grades will also be considered.

High Level of English.

Ways to stand out from the crowd:

Background in Specman.

Knowledge in Verilog.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
With the slowdown in Moore's law, silicon power management and hardware power optimizations become a critical part of the development of silicon ASICs. We are positioning you for a key role to take on this challenge and become part of our team, so we can continue developing the best devices in the industry!

Our network horizontal power group is seeking for a highly-skilled, physical design engineer to explore, define and assimilate methods for optimizing our products' power with respect to performance and cost. In your role you'll be responsible to develop methodologies, improve tools and flows, driving power optimization and examine silicon power & performance. We are searching for a hard-working, highly motivated, engineer which has both excellent technical skills as well as outstanding personal skills.

What you will be doing:

Establish estimation and optimization techniques for RTL design and physical design teams.

Improve estimation quality and pre2post correlation.

Develop methodologies and flows across the organization for both pre and post-silicon analysis.

Improve RTL to gate level power aware flows and automation.

lead power execution teams with working methods and power model for various product lines.
Requirements:
What we need to see:

B.Sc. degree or equivalent experience in Electrical Engineering.

Strong physical design fundamentals, knowledgeable in timing analysis, power analysis, and scripting.

Excellent problem-solving, partnership, and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
01/04/2024
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 2 years of relevant experience.

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modelling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus).

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced, highly motivated software engineer to join our Chip Design Technologies team. As a member of this team, you will be exposed to the world of EDA software development. This field merges electrical and software engineering to create software tools and solutions used to expedite the design and validation of the next generation of product designs. In our company, these products are aimed at advanced data centers, and power AI revolution across the world.

What you'll be doing:

Leading the charge in developing software tools and solutions, crucial for creating cutting-edge design validation methodologies for us.

Enhancing and refining our suite of in-house tools, used in design validation flow.

Collaborating with designers, verification specialists to ensure your solutions seamlessly integrate into our design validation process.
Requirements:
What we need to see:

Computer Science / Computer Engineering degree.

A minimum of 5 years' hands-on experience.

Strong programming skills in Python.

A proactive attitude, eager to communicate with design engineers and committed to continuous design process improvement.

Strong analytical, debugging and problem-solving skills.

Ways to stand out from the crowd:

Knowledge in Linux.

Experience in DA / CAD team.

Experience in VLSI chip design/verification.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
16/04/2024
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our technology has no boundaries! We are building the worlds most groundbreaking and state-of-the-art computing platforms for the world to use. Its because of our work that scientists, researchers, and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most fast-paced computer users in the world - scientists, designers, artists, and gamers.

Its not just technology though! It is our people, some of the brightest in the world, and our company's diverse culture makes us one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence, determination, and team, which guide us to be the best we can be. We are now looking for a motivated Chip Architect to use your creativity to work on the ConnectX network adapter with the highly inventive and knowledgeable team.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications).

Drive Architecture/Software/Hardware co-design and collaboration on features set.

Work on proof of concepts and advance development projects.

Perform research and analysis for current and future architectures.

Craft product design specifications.

Serve as a focal point within the organization and distribute the knowledge that you acquire.
Requirements:
What we need to see:

BSc or MSc or equivalent experience in electrical engineering.

5+ years of proven relevant experience.

Deep understanding of how to build and integrate systems with various technology components.

Knowledge and understanding of computing and networking systems.

A can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast-paced environment.

Utmost passion for attention to detail in design and a high focus on design quality.

Ways to stand out from the crowd:

Experience with multi-core systems, memory subsystem, and CPU micro-arch

Solid understanding of OS, firmware, and system performance

Good grasp of device security

Familiarity with on-chip debugging and monitoring system performance
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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נאספה מאתר אינטרנט
27/03/2024
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

Proficiency using Python, Perl, Tcl, Make scripting.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modelling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus)

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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7669818
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נאספה מאתר אינטרנט
16/04/2024
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a highly motivated Software Modeling Engineer to join our team, and to ramp the activity of simulation and modeling in the architecture group. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs.
As a modeling engineer in our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you'll be doing:

Develop from scratch the entire modeling environment and infrastructure with the architecture team.

Develop software-based switch architecture models.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

Lead bringup and debug of new switch configurations in simulation.
Requirements:
What we need to see:

BSc or MSc in Electrical Engineering / Computer Science or equivalent experience.

5+ years of chip modeling / software engineering / chip design / design verification / validation experience.

Hands on experience in C/C++.

Experience with scripting languages (Python).

Excellent interpersonal skills and ability to collaborate with on-site and remote teams.

Deep understanding of how to build and integrate systems with various technology components.

Strong debugging and analytical skills.

Ways to stand out from the crowd:

Knowledge and understanding of networking and compute systems.

You're passionate about low level software .

Experience with HW/SW interactions.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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