We are seeking an Experienced Engineer to join our High-Speed Electrical Validation Lab in Omer. Our lab utilizes cutting-edge high-speed equipment for ASIC electrical testing and is responsible for developing and executing automated tests using advanced tools such as JBERT and high-bandwidth oscilloscopes. The team is focused on characterizing high-speed ASIC interfaces such as PCIe, MPHY, USB and DDR ensuring quality through precise analysis and automation development.
Duties and Responsibilities:
Collaborate with cross functional teams (ASIC design, product development, systems) to define high speed electrical test requirements.
Develop test infrastructure and automation frameworks with the goal of finding and root causing PHY hardware issues early in the ASIC and product development cycle.
Work across various functional teams (PHY IP suppliers, ASIC design, FW, HW, Systems, SI/PI) to ensure correct operation of the PHY IPs in the product application.
Evaluate next generation PHY technologies and IPs and provide recommendations on technical performance.
Debug and drive PHY IP issues to successful resolutions.
Define and manage hardware requirements for high-speed characterization boards development, including SI/PI considerations.
Analyze test results and provide conclusions on quality.
Generate and present characterization reports to stake holders.
Requirements: Bachelors degree in electrical engineering or equivalent.
3+ years of experience in high-speed interface validation (e.g., PCIe, USB, SATA, MPHY).
Knowledge of PHY SerDes transmitter and receiver architectures, equalization schemes and functional blocks
Strong problem-solving skills with the ability to work in time-sensitive, resource-limited environments.
Highly motivated with a strong ability for self-learning.
Experience with the ASIC development process from design to silicon (preferred).
Experience in lab equipment automation (preferred).
Python programming experience (preferred).
Knowledge of high-speed interface protocols and validation experience is a plus.
Experience in characterizing PAM4 signaling based high-speed interfaces is a plus.
Excellent oral and written communication skills.
This position is open to all candidates.