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We are seeking a HW Board Design Engineer.
Meet the Team
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. Our Silicon One is a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.

Required Electrical Post-Silicon Characterization & Validation Engineer
Meet the Team:
The Silicon One Post-Silicon Electrical Validation (EPSV) team in Caesarea works on the fastest, most power-hungry networking chips in the industry. We are the hardware experts who take the raw silicon and prove it actually works in the real world. We don't just run scripts from a desk-we get our hands dirty in the lab physically probing boards and testing the limits of the hardware. Love sophisticated hardware puzzles? Want your work to directly impact mass production? This is the team to be in.
Your Impact:
Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.
Why Join Us:
Be part of a team working on the most advanced silicon products in the market! Are you an engineer who prefers physical testing and measuring boards in the lab over just running validation scripts on a computer?, This is the place for you!. We value pure hardware talent and provide ample opportunities for professional advancement.

We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.

We are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team within Silicon One owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of our most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the Silicon One team, which is at the heart of our software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.
Contribute to physical synthesis, place and route, optimization, and timing closure for complex VLSI designs.
Support design floor planning and implementation planning in collaboration with senior physical design engineers.
Analyze timing, congestion, power, area, and design-rule issues and help drive them toward closure.
Work with physical design verification flows, including LVS and DRC, to support clean implementation handoff.
Partner with cross-functional teams to debug implementation issues and improve backend flow quality.

Required Junior Hardware Engineer - Signal & Power Integrity - Israel - ETR
Location:Caesarea, Israel
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
What You Will Do:
You'll be joining our Silicon One Signal & power Integrity team, which is at the center of the silicon development. Our SIPI engineers deal with all system development aspects and deliver detailed specifications to other development team. As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.

As a key member of our best-in-class CAD Group, you will be part of building innovative designs. We will apply your hands-on experience in power EM/IR analysis to develop, define and refine the methodologies and flows for gate-level, as well as transistor level designs. Major tasks will include functional static / dynamic IR analysis, scan mode IVD analysis, package and interposer model handling, 3DIC and multi die analysis, power EM analysis, SigEM, power switch modeling, design abstract and reuse for EM/IR purposes, IP / SoC level EMIR sign-off / ECO, and much more.

In this highly visible role, your primary responsibilities will include:
- Development of custom EM/IR solutions that scale with accuracy and capacity challenges.
- Streamline and automate EM/IR flow with ownership of the entire flow.
- Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their EM/IR requirements for various post-layout flows.
- Work side by side with EDA vendors and foundries for tool qualification, debug, and enhancement.

We are building a new team focused on redefining the future of code analysis infrastructure, combining advanced GenAI techniques with deep static code analysis. We're looking for a highly motivated Agentic code analysis engineer to join us on this mission.
We're working in a hybrid model: 3 days in the office, 2 days from home.

You are invited to meet the R&D team here!

In this role, you will:

Research and develop next-gen code analysis and remediation algorithms

Work hands-on with GenAI models and integrate them into detection workflows

Tackle complex software analysis problems (e.g., call graphs, control/data/taint flow analysis)

Collaborate closely with Product Managers, Algorithm software engineers and application software engineers to prototype, validate, and productize your innovations

Responsibilities:

Design and implement machine learning and algorithmic solutions for code analysis

Build GenAI-powered developer tools for static and semantic code analysis

Enhance our existing detection infrastructure with intelligent, context-aware insights

Translate cutting-edge research into practical, scalable product features

We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.

We are looking for a SW Engineering Manager to manage and mentor a team of engineers developing AI-based Agents. In this role, you will combine hands-on technical leadership with strong execution, ensuring high-quality delivery across multiple agent projects. You will drive development processes, maintain clear communication with stakeholders, and support the team through the full lifecycle of agent development, from design to production and beyond.
Lead, mentor and grow a team of AI-agent developers; foster a collaborative and a high-performance environment.
Own team execution: sprint planning, priorities, delivery commitments, and production support.
Oversee end-to-end development of AI agents: design, implementation, integration, deployment, monitoring and continuous improvement.
Maintain a clear capability matrix and roadmap across multiple agents and integrations.
Communicate progress, risks, and status updates clearly to product, management, and cross-functional teams.
Provide hands-on technical leadership: review code, support architectural decisions, and uphold engineering best practices.

Required ASIC Design & Verification Engineer
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab.

The Silicon Technology Wireless EPM team is seeking an Engineering Program Manager (EPM) to lead the planning, execution, and delivery of complex wireless solutions for our products.
This role requires both technical depth and program management expertise to drive projects from concept through tape-out and into mass production.
As an EPM, you will partner closely with architecture, design, validation, firmware, factory, and test engineering teams to ensure programs achieve performance, quality, and schedule goals.
You will be a central point of coordination, driving execution, and communication across all stakeholders.

Drive planning, prioritization, and execution, ensuring alignment with aggressive schedules and quality targets.
Anticipate and navigate complex technical and organizational challenges to enable timely, effective resolutions.
Establish and maintain robust execution plans with clear milestones, KPIs, and reporting mechanisms.
Facilitate cross-functional trade-off discussions grounded in data-driven decision-making and stakeholder alignment.
Build relationships across the organization and cultivate a collaborative, transparent environment that strengthens communication and efficiency across teams and with leadership.
Continuously refine engineering processes and methodologies to optimize performance and scalability.

We are looking for a talented and experienced Sr Staff Software Engineer to join our dynamic Data & AI Platform team. Our organization provides cutting-edge services utilized by both internal teams and external customers. The ideal candidate will be responsible for defining and implementing best practices, working on edge technologies on the cloud, and ensuring high ROI on deliverables across all stages of the Software Development Life Cycle (SDLC).
Your Impact:
Define and implement best practices for the R&D platform.
Collaborate with internal and external stakeholders to understand requirements and deliver high-quality solutions.
Work on edge technologies and cloud platforms to enhance our services.
Participate in all phases of the SDLC, including design, development, testing, and deployment.
Ensure high ROI on deliverables by optimizing processes and solutions.
Share knowledge and best practices across the company to promote a culture of continuous improvement.

Required ASIC Design Engineering Technical Leader
Meet the Team
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

Required PHY Post Silicon Validation Engineer
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With:
You'll be part of our Group driving our game changing next generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!