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We are seeking an experienced Security Architect who has experience in confidential computing and attestation systems. The ideal candidate should have deep expertise in at least one leading confidential compute architecture and ideally in PCIe support around TDISP, IDE, SPDM. Strong knowledge of general system security, virtualization and hardware-enforced isolation primitives is essential.

What you'll be doing:
Lead, research, design, develop, and implement solutions for next-generation confidential computing network devices.
Develop novel hardware isolation mechanisms to provide defense in depth in the SoC.
Collaborate with external and internal hardware and software teams to implement and deliver the architecture.
Architectural modeling, validation, microarchitectural definition, and developing proofs-of-concept for secure platforms.

Youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join our team as a Senior Power and Performance Architect - Networking, influencing the future of our network systems.

What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!

We are seeking a technical leader to define, craft, implement, and guide firmware architecture for reliability, availability, serviceability, and power management across next-generation Networking products and platforms. You will take a strong hands-on role, working with hardware, firmware, software, validation, customer engineering, and external partners to build robust, diagnosable, power-efficient systems for large-scale deployments.

What you'll be doing:

Define platform-level firmware architecture for RAS and power management across SoCs, accelerators, DPUs, servers, embedded systems, and data center platforms.

Own error detection, classification, containment, recovery, escalation, and reporting architecture.

Define firmware architecture for power sequencing, power states, reset flows, thermal and power fault handling, idle management, and recovery from power-related failures.

Create firmware specifications for hardware error handling, health monitoring, crash capture, telemetry, diagnostics, debug data, and field serviceability.

Define interfaces and contracts between firmware, hardware, operating systems, BMCs, management controllers, platform software, and cloud/service infrastructure.

Drive architecture reviews, tradeoff discussions, failure-mode analysis, validation strategy, and long-term RAS and power management roadmap planning.

Establish standards for error logs, event schemas, telemetry flows, recovery policies, service diagnostics, and production debug infrastructure.

Guide engineering teams through implementation, validation, silicon bring-up, platform integration, and production deployment of RAS and power management features.

Analyze customer and field failures, identify architectural gaps, and feed lessons learned into future platform designs.

The Senior Technical Quality Program manager will provide leadership and management for the quality function and sustain the quality philosophy for the organization. Establish, maintain, and optimize an effective quality management system. Build and implement a quality plan to achieve the levels of product quality at scale , in alignment with product requirements, customer expectations and related partners. Enhance and improve products by working towards problem-solving tools, prevention methods, quality-at-the-source, and continual improvement techniques. Management Representative for Product Quality.

What Youll Be Doing:

Lead quality scale up programs across the product lifecycle-from production ramp to mass production-with a focus on robust manufacturability and zero-defect delivery.

Own and drive closure of all quality aspects related to manufacturing and customer-facing issues, ensuring high product reliability and customer satisfaction.

Drive detailed root cause analysis and corrective actions (8D, CAPA) for field failures, customer complaints, yield issues, and in-line test escapes.

Manage and track quality-related action items to ensure timely execution, cross-functional accountability, and detailed closure.

Act as the focal point for issue resolution across engineering, operations, supplier quality, and customer teams.

Implement and track quality controls throughout the production process, final test evaluations, and outgoing quality indicators to support continuous improvement.

Align global cross-functional teams (hardware, software, manufacturing, product engineering, procurement) to ensure smooth product quality scale-up.

Create and monitor quality metrics via dashboards, issue summaries, and recovery plans with leadership and key collaborators.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.



Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!



What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are a global leader in high-performance smart energy technology, with over 3000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. The Role: We are searching for a highly skilled PCB Layout team leader to take the helm of our core Layout Design group. This is a hands-on leadership role (~50% design, ~50% leadership) that requires a unique blend of technical mastery and managerial excellence. You will be responsible for balancing team capacity, driving workflow improvements, and acting as a professional technical authority for the layout of our most advanced solar and energy Storage products. This role offers a significant opportunity to influence company-wide PCB layout methodology, update design standards, and directly shape our 2026 operational excellence roadmap. What you will do: Managerial Responsibilities:
* Lead and manage the internal PCB Layout team (resource allocation, mentoring, load-balancing) to support major A1 R&D projects like Optimizers, Inverters, and Storage.
* Oversee the teams Jira ticketing system, utilizing Managerial Visibility Dashboards and RAG (Red/Amber/Green) statuses to track workflow bottlenecks, manage delays, and enforce structured data entry.
* Serve as the primary interface between the Layout team and external departments, including Hardware Directors, Mechanical Engineering, Q&R, and external PCB manufacturing factories.
* Matrix-manage and assign tasks to external/global layout resources (such as our India team and outsource bureaus like Mindboard), ensuring smooth communication and delivery. Professional & Technical Responsibilities:
* Act as the technical authority for the department, leading complex design reviews, pre-completion checks, and making key technical tradeoffs (stack-up, routing strategies, SI/PI).
* Own and aggressively update internal layout methodologies.
* Provide professional mentorship and training to layout editors, actively stepping in to unblock technical challenges and executing complex layouts yourself.
* Resolve complex cross-departmental technical issues, such as mechanical 3D transfer conflicts, strict High-Voltage (HV) spacing rules, EMI/EMC mitigation, and advanced manufacturing capabilities (press-fit components, robotic soldering).
 
Country:
Israel
City:
Herzliya

We are a global leader in high-performance smart energy technology, with over 3000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. The Role: We are looking for an experienced PCB Layout Designer to join our Layout Design team within the Hardware division. The Layout Design team is responsible for the layout of all core Hardware products, including High-Voltage power boards, optimizers, communication circuits, and complex battery management systems (BMS). This is a highly challenging role where you will work in a dynamic, fast-paced environment, handling multiple priority projects under tight schedules while working closely with Hardware, Q&R, and Mechanical engineers. What you will do:
* Design and develop multi-layer PCB layouts from concept to production, including placement, routing, and final manufacturing outputs.
* Translate schematics into optimized layouts considering Signal Integrity (SI), Power Integrity (PI), EMI/EMC mitigation, thermal, and manufacturability constraints.
* Work in a Cadence Allegro and OrCAD Capture environment, including the use of parallel layout tools like Symphony to accelerate delivery.
* Collaborate closely with Mechanical engineers (handling 3D IDF/IDX transfers), R&D teams, and Reliability (Q&R) teams to meet strict mechanical constraints.
* Strictly adhere to our internal "Design Considerations" guidelines and the team's layout "Cookbook" methodologies to ensure standardized execution.
Country:
Israel
City:
Herzliya

The ideal candidate will possess strong problem-solving abilities and passion for developing innovative embedded solutions.

In this role, you will design, implement and maintain real-time embedded software for our next-generation wireless power products.

You will report directly to the VP of R&D.

Job Responsibilities:
Design, develop, improve, and maintain real-time embedded software from concept through production.
Define and implement firm architecture on ARM Cortex-M & STM8 microcontrollers.
Integrate real-time embedded software with external hardware components and complete system products.
Collaborate closely with hardware, systems and QA teams to ensure seamless integration and performance.
Participate in code reviews, debugging and system validation processes.
Create and maintain clear technical documentation for design and code.

our companys Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
In our company, Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5/6, PCIe Gen4/5, CDPHY, and MPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SIPI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our companys EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions and automation, validation SW tools development, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.