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We are the world-leader fast-growing company which supports the most powerful super computers in the world. We make outstanding artificial intelligence and make the most outstanding applications happen just ask ChatGPT.

We believe in our people and products and seek excellent people to join us!

The Networking Application Engineering team is looking for a hardworking, keen engineer to join the team and support groundbreaking technology.

As Networking Optical Application Engineer, one will have a real impact on the business, while working closely with our customers and R&D teams.

What youll be doing:

Support new supercomputers and AI fabrics technologies.

Gain our customers trust and understand their needs.

Work closely with various R&D teams and develop solutions per our customers needs.

Lead the way on cooperations between different teams within the company.

Solve complex issues while leading highly visible customer issues.

Provide constructive feedback to engineering and marketing regarding products requirements.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The company`s System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

We arw looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for best-in-class Senior VLSI integration Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Implement Chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design) .

Be exposed and work on a variety of functional and structural challenges. Including functional debug, getting ready for physical design, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks

Taking part in flows development and deployment

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.

As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

Our technology has no boundaries! We are building the worlds most groundbreaking and state-of-the-art computing platforms for the world to use. Its because of our work that scientists, researchers, and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most fast-paced computer users in the world - scientists, designers, artists, and gamers.

Its not just technology though! It is our people, some of the brightest in the world, and our company's diverse culture makes us one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence, determination, and team, which guide us to be the best we can be. We are now looking for a motivated Chip Architect to use your creativity to work on the ConnectX network adapter with the highly inventive and knowledgeable team.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Drive Architecture/Software/Hardware co-design and collaboration on features set.

Work on proof of concepts and advance development projects.

Perform research and analysis for current and future architectures.

Craft product design specifications.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

Our technology has no boundaries! We are building the worlds most groundbreaking and state-of-the-art computing platforms for the world to use. Its because of our work that scientists, researchers, and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most fast-paced computer users in the world - scientists, designers, artists, and gamers.

Its not just technology though! It is our people, some of the brightest in the world, and our company's diverse culture makes our one of the most fun, innovative and dynamic places to work in the world! At the center of our culture are our core values like innovation, excellence, determination, and team, which guide us to be the best we can be. We are now looking for a motivated Chip Architect to use your creativity to work on the ConnectX network adapter with the highly inventive and knowledgeable team.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications).

Work on proof of concepts and advance development projects.

Perform research and analysis for current and future architectures.

Craft product design specifications.

Serve as a focal point within the organization and distribute the knowledge that you acquire.

Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for a DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take ATPG ownership on different DFT aspects of a project, Arch & planning, pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.

We are looking for a highly experienced HW and Failure Analysis Engineer who embodies ambition and positivity. Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Join us in this exciting journey to redefine the future of quantum computing.
Responsibilities:
Test & Test procedure definition
HW DFT definition
Failure analysis of multi-discipline systems. CPU, FPGA, digital, analog, and RF.
Traveling and working at remote manufacturing sites
Deep understanding of manufacturing processes
Failure tracking and issues failure indicators
Qualification measurements engineering guide

We are looking for a Python SDK Team Lead who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
The Quantum Computing SDK is the interface through which our customers run QM control system. Customers use it to configure their cutting-edge system and run their ground-breaking experiments.
Various institutions from world-class universities to hyper-scalers use the SDK to calibrate their delicate QBits, perform Write and Read Quantum Computing Operations and run programs in higher level Quantum Computing languages like OpenQASM3.
Responsibilities :
Develop the software for the company's Quantum Computing SDK.
Develop, test and release the software for the company's Quantum Computing SDK.
Lead the technical aspects of the SW development from design to delivery.
Promote high standards of SW methodology, clean-code and CI.

We are looking for an experienced hands-on Embedded SW Engineer who can work independently with remote teams (SW, HW, logic,) and create products that will shape the future of Quantum Computers.

We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. NVIDIA has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of NVIDIA's core technology.
You will work on developing new formal verification methodologies and tactics.

We are looking for a Senior Chip Design Engineer, Formal Verification for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch and GPU technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of the AI revolution. Our team delivers world class Chips solutions for HPC, AI infrastructures, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tape-outs. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

You will take part in the AI revolution led by us, working on cutting edge architecture.