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2 ימים
דרושים בRisco Group
Location: Rishon Letsiyon
Job Type: Full Time
Responsible for the end-to-end development and design of hardware projects, from requirements definition and technical planning through development, integration, validation, and transfer to production. The role includes analog and digital circuit design, component selection, system architecture definition, and close collaboration with cross-functional teams to ensure successful product delivery throughout the entire product lifecycle.
Requirements:
B.Sc. in Electrical and Electronics Engineering.
At least 5 years of experience in digital circuit design and development.
Proven experience in hardware-software integrated product development.
Experience with PSPICE simulation. Advantaged
Experience with high speed. - Must
Experience with DDR
Knowledge of power supplies and amplifier design- Advantaged
Fluent English, both written and spoken.
This position is open to all candidates.
 
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8768894
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משרה בלעדית
1 ימים
דרושים בדיאלוג
סוג משרה: משרה מלאה
לחברת הייטק מצליחה אשר מפתחת מערכות communication connectivity אלחוטיות לקסדות אופנועים, סקי ועוד, מקדמת עידן חדש בבטיחות, סאונד ותקשורת ונחשבת למובילה העולמית בתחומה (המוצרים נמכרים במעל 100 מדינות), דרושה HardWare Manager למשרה הכוללת הובלת צוות מהנדסים (6) והנעת Design, פיתוח, validation certification של מוצרי חומרה ואלקטרוניקה מורכבים.
הובלת hardware strategy ותהליכי הנדסה.
במסגרת התפקיד ניהול ואחריות על מחזור חיי הפיתוח המלא של החומרה החל מהגדרת דרישות וארכיטקטורה, דרך Design, וואלידציה ו- production release.
ביצוע design reviews וקבלת החלטות טכניות בהתאם לדרישות המוצר ואילוצי מערכת.
עבודה מול צוותי תוכנה, מכונות, QA הנדסה, NPI, רכש ועוד.
הגדרה ויישום של מתודולוגיות בדיקה וואלידציה להבטחת performance, reliability ועמידה בתקינה.
הובלת פעילות certification and regulatory compliance עבור מוצרים חדשים וקיימים צוך עמידה בתקינה ודרישות שוק.
יצירה ותחזקה של תיעוד- מסמכי תכנון, מפרטים
דרישות:
BSc בהנדסת חשמל ואלקטרוניקה
10 ומעלה שנות ניסיון בהובלת פיתוח חומרה בסביבה מולטידיסציפלינארית
ניסיון מעשי ב- hardware design כולל analog digital design ו- PCB development
רקע בתכנון סכמות ו- layout designs - OrCAD / Altium
הבנה מעמיקה של Bluetooth, Zigbee, and Wi-Fi - RF PHY / MAC
ידע מעמיק ב- RF testing ו- Lab equipment usage
הבנה מעמיקה של certifications of Low RF Power systems - FCC, CE, TELEC, NCC, SRRC, BSMI
ניסיון בפיתוח מחזור חיי מוצר מלא משלב הרעיון ועד לייצור המוני
הבנה מעמיקה של תהליכי בדיקה, וואלידציה ו- hardware qualification
ניסיון בעבודה מול צוותי תוכנה, מכניקה, QA ותפעול המשרה מיועדת לנשים ולגברים כאחד.
 
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משרה בלעדית
1 ימים
Job Type: More than one
Salary: 35,000 ויותר
RF hardware R&D
Requirements:
*Requirements:**
- Bachelor of Science (B.Sc.) in Electrical Engineering or a related technical field.
- At least 7 years of hands-on experience in RF hardware design and development.
- At least 2 years of proven experience in RF power amplifier design.
- Strong proficiency in RF simulation tools, such as Keysight ADS or Cadence AWR.
- EM simulation experience in HFSS or ADS.
- Proficiency in schematic design tools, such as Altium Designer or OrCAD Capture.
- Experience in analog circuit design and SPICE simulations.
- Strong system -level understanding of RF architectures and design trade-offs.
- Excellent analytical and problem-solving skills, with a hands-on approach to engineering challenges.
- Proficiency in a lab environment and TEST equipment.

The position is open to both men and women
This position is open to all candidates.
 
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8898223
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2 ימים
Job Type: Full Time
Ready to take your electronics expertise to the next level?

An innovative defense-tech startup developing advanced drone systems and cutting-edge technologies is looking for a talented Senior Electronics Engineer to take a key role in hardware development.

This is a unique opportunity to work on challenging, multidisciplinary projects, take ownership of your designs, and make a real impact on products from concept to reality.
Requirements:
The Role-

Lead hands-on electronics development, including analog and digital circuit design, PCB design, schematic capture, board bring-up, testing, and system integration.

Work with microcontrollers, sensors, and Embedded systems while collaborating closely with multidisciplinary engineering teams.

What We're Looking For

B.Sc. in Electrical or Electronics Engineering with at least 5 years of hands-on hard
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8896137
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חברה חסויה
Job Type: More than one
You will work closely with hardware engineers from schematic design through production, taking ownership of complex
multilayer PCB layouts in a multidisciplinary development environment.

What Youll Do
* Design complex multilayer PCBs (2-10 layers and above) using Cadence Allegro PCB Designer
* Work with OrCAD Capture schematics and implement them accurately in layout
* Define design rules according to electrical, EMC/EMI, and Signal Integrity requirements
* Design routing for high-speed analog and digital signals and communication interfaces
* Work with low and medium voltage designs, including isolation and separation requirements
* Collaborate with the mechanical team for enclosure integration
* Prepare manufacturing files (Gerber, Drill, Stackup, Pick & Place) and support production
* Work with Priority ERP for component database management
Requirements:
* 3-5+ years of PCB layout design experience
* Strong experience with Cadence Allegro PCB Designer
* Experience working with OrCAD Capture
* Experience designing multilayer boards
* Good understanding of Signal Integrity and Power Integrity
* Experience with EMC/EMI standards - significant advantage
* Experience with mixed-signal designs (Analog + Digital) - advantage
* Experience working with PCB manufacturers and assembly processes
* Strong teamwork and communication skills
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8764396
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משרה בלעדית
2 ימים
מיקום המשרה: נתניה
סוג משרה: משרה מלאה
תיאור התפקיד:
עבודה בצוות האחראי על תכנון, בדיקות ואיתור תקלות בספקי כוח ומעגלים אנלוגיים, וכן הכנת תיעוד טכני. התפקיד כולל תמיכה הנדסית לאורך מחזור חיי המוצר.
דרישות:
דרישות התפקיד:
תואר ראשון (B.Sc.) בהנדסת חשמל.
ניסיון של שנתיים כמהנדס/ת אנלוג/הספק.
ניסיון מוכח בעבודה עם ציוד מעבדה כגון אוסצילוסקופ ועומסים אלקטרוניים.
ידע במעגלים אנלוגיים ובטופולוגיות של ספקי כוח (Buck, Boost, Flyback וכו').
ניסיון באיתור תקלות בלוחות (Power, Analog, Digital).
אנגלית טכנית טובה.
יכולות עבודה ידניות טובות (הלחמות, חיווט וכו').
יתרון: ידע במעגלים דיגיטליים/תקשורת.
יתרון: ידע ב-VHDL/Verilog/ C.
יתרון: ידע בתכנון מגנטי.
יתרון: ידע בלולאות בקרה (Feedback Control Loop). המשרה מיועדת לנשים ולגברים כאחד.
 
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עדכון קורות החיים לפני שליחה
8880277
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Location: More than one
Job Type: Full Time
Senior RF Engineer
We are looking for a talented, experienced, and highly motivated Senior RF R amp;D
Engineer with at least 7 years of hands-on experience in RF hardware development.
The position focuses on the design and development of advanced high-power
RF amplifiers (SSPAs), from initial concept and simulation through prototyping,
integration, testing, and validation.

Location: Tel-Aviv, On-Site 

Strong system -level understanding of RF architectures and
Requirements:
Requirements:
At least 7 years of hands-on experience in RF hardware design and
development.
At least 2 years of proven experience in RF power amplifier design.
Strong proficiency in RF simulation tools, such as Keysight ADS or Cadence AWR.
EM Simulation Experience in HFSS or ADS
Proficiency in schematic design tools, such as Altium Designer or OrCAD
Capture.
Experience in analog circuit design and SPICE simulations.
This position is open to all candidates.
 
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8897966
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2 ימים
דרושים באלביט מערכות
Location: Haifa
Job Type: Full Time
We are looking for
Elbit Systems is looking for a Board Design Engineer for our Haifa site within the Aerospace Division. Join a leading global technology company developing advanced mission-critical systems and cutting-edge solutions across a wide range of defense applications. As part of our multidisciplinary engineering teams, you will take part in the development of advanced hardware platforms while working with cutting-edge technologies and complex engineering challenges
Requirements:
Bachelor's degree in electrical engineering
At least 3 years of experience in digital electronic board design
Experience with requirements capture and top-level architecture
Understanding of PCB layout methodologies and high-speed PCB design concepts
Experience working with signal integrity simulation tools such as Hyperlynx, Ansys, or similar tools
Experience with PCB design tools such as Altium Designer, Mentor Expedition, or Cadence
Experience in Voltage Regulated Modules DC/DC (VRM) design - Advantage
Background in retimers and redrivers - Advantage
Experience in Analog Circuit Design (amplifiers, filters, etc.) - Advantage
Problem-solving skills, teamwork abilities, and effective communication skills

*Only relevant applications will be answered
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
8773161
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2 ימים
דרושים באלביט מערכות
Job Type: Full Time
We are looking for
At Elbit Systems in Modi'in, we are looking for a Board Design Engineer to join a team developing advanced hardware solutions at the heart of cutting-edge defense technologies. This is an opportunity to take part in the development of mission-critical products, work with multidisciplinary teams, and make a real impact through innovative electronic design
Requirements:
Bachelors degree in Electrical Engineering
At least 7 years of experience in digital electronic design
Experience in board requirements definition and top-level architecture definition
Proficiency in PCB design tools such as Altium Designer, Mentor Expedition, or Cadence
Knowledge of PCB layout methodologies and signal integrity tools such as Hyperlynx or Ansys
Experience in Voltage Regulated Modules (VRM) design and analog circuit design - Advantage
Experience with processor-based hardware platforms, CPU architecture such as ARM or X86, and system -level design - Advantage
Knowledge of Python or other software languages, strong problem-solving skills, and ability to work effectively with multidisciplinary teams

*Only relevant applications will be answered
This position is open to all candidates.
 
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8798961
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משרה בלעדית
2 ימים
דרושים בSQLink
מיקום המשרה: מספר מקומות
סוג משרה: משרה מלאה
ארגון ביטחוני באזור המרכז מגייס Verification engineer
התפקיד כולל: פיתוח סביבות Verification במתודולוגיית UVM עבור מערכות FPGA, הגדרה, ארכיטקטורה ופיתוח של סביבות אימות מרמת Block Level ועד Full-Chip, עבודה על מגוון פרויקטים בתחומי עיבוד אות ו-Controllers, וכן עבודה בצמוד לצוותי FPGA, מהנדסי מערכת ואלגוריתמאים.
דרישות:
- 5 שנות ניסיון בתחום הוריפיקציה משלב הגדרת TEST Plan ועד Coverage
- ניסיון מעשי ב-UVM וב-SystemVerilog
- ניסיון ב-Verification עבור FPGA / ASIC
- ניסיון ב-RTL Debugging
- ניסיון בכתיבת סקריפטים ועבודה עם כלי סימולציה
- B.Sc בהנדסת חשמל / אלקטרוניקה / מדעי המחשב המשרה מיועדת לנשים ולגברים כאחד.
 
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8892095
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דרושים בגב מערכות
מיקום המשרה: חולון
סוג משרה: משרה מלאה
תנאים נוספים:קרן השתלמות
לחברה ביטחונית וטכנולוגית מובילה בחולון דרוש/ה מהנדס/ת Verification מנוסה להצטרפות לצוות מקצועי העוסק בפרויקטים טכנולוגיים מתקדמים בתחומי FPGA, עיבוד אות ו-Controllers.
במסגרת התפקיד:
הגדרה, ארכיטקטורה ופיתוח סביבות Verification במתודולוגיית UVM
ביצוע Verification לתכנוני FPGA מרמת Block ועד Full-Chip
כתיבת TEST Plans, פיתוח תרחישי בדיקה ועבודה עד Coverage Closure
ביצוע RTL Debugging ברמת Block וברמת system
עבודה צמודה עם צוותי FPGA, מערכת ואלגוריתמים
עבודה בסביבת Linux וכתיבת סקריפטים לצורכי אוטומציה
דרישות:
תואר ראשון בהנדסת חשמל, אלקטרוניקה או מדעי המחשב - חובה
לפחות 5 שנות ניסיון ב-Verification של FPGA או ASIC - חובה
ניסיון מעשי ב-SystemVerilog ובמתודולוגיית UVM - חובה
ניסיון בפיתוח סביבות Verification ברמת Block וברמת Full-Chip
ניסיון בכתיבת TEST Plans ובעבודה עד שלב ה-Coverage
ניסיון ב-RTL Debugging ברמת Block ועד system Level
ניסיון בעבודה עם כלי סימולציה - ניסיון ב-Questa Simulator מהווה יתרון
ניסיון בכתיבת סקריפטים ב- Python, TCL, Bash או Csh
ניסיון בעבודה בסביבת Linux
אנגלית טכנית ברמה טובה מאוד
יכולות אנליטיות גבוהות ויכולת עבודה עצמאית ובצוות מולטי-דיסציפלינרי המשרה מיועדת לנשים ולגברים כאחד.
 
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8815478
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לוח ללקוחות VIP בלבד
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.
Requirements:
Minimum Qualifications
5+ years experience in analog IC design.
Deep understanding of transistor device characteristics.
Deep understanding of power, performance and area trade-off in mixed-signal designs.
A proven track record of high-performance designs in high volume production for low power applications.
Knowledge of analog IC design flow and tools.
Strong communication skills are a must, as the candidate will interface with a lot of different groups within the company.
Excellent social and interpersonal skills.
Hands-on design expertise in one or more of the following areas: High Speed, Low Power I/O Circuit Design: familiarity with PHY principles and concepts including forwarded clock topologies, training and calibration schemes etc.); High Speed Clock Path: low jitter distribution, DCD correction, phase shift (through delay lines or phase interpolation); Analog Front End: low noise and high-resolution signal conditioning prior to ADC and Op-Amp, switched-cap and continuous time filters, reference/bias generation, LDO etc.; Data Conversion: ADC and DAC subsystem. Different styles of data converters (ΔΣ, SAR, pipelined, SAR and flash) and associated calibration techniques.
Strong initiative and ownership of responsibilities, productive.
Ability to work well in a team and be productive under tight schedules.
Experience with advanced FinFET CMOS processes - an advantage.

Preferred Qualifications
B.Sc. in Electrical Engineering.
MS.c\ PhD - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8876825
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Location: Yokne'Am Illit
Job Type: Full Time
We are pioneering the future of medical diagnostics with our innovative capsule endoscopy solutions. Imagine a world where diagnosing gastrointestinal conditions is as simple as swallowing a pill which captures with imagers and different sensors the digestive system and transmit it in real time. Our cutting-edge technology not only makes this possible but also revolutionizes the patient experience, providing a non-invasive, accurate, and efficient diagnostic tool. We are seeking a dynamic and visionary Analog and RF engineer to join our dedicated team, driving the development and integration of our next-generation capsule endoscopy devices.
As a Senior Analog & RF Engineer specializing in capsule endoscopy development, you will play a key role in the design, development, and integration of the critical analog and RF communication path between the capsule, located inside the patients digestive system, and the external recorder worn by the patient.
You will be responsible for developing high-performance, low-power analog and RF solutions that enable reliable wireless communication, contributing directly to the performance and advancement of our next-generation medical devices.
In this critical role, you will collaborate closely with System Engineers, PCB design and Layout, Firmware Developers, Modem Algorithm Engineers, and Mechanical Design teams to develop and integrate advanced solutions across the system. You will work in a highly collaborative, open-minded environment that encourages new ideas, creativity, and innovation, contributing to cutting-edge medical technology that enhances patient care.
Primary responsibilities:
Own and drive the Analog & RF communication path from architecture definition through detailed design.
Work closely with leading semiconductor suppliers and technology partners on a system on Chip definition, development, and integration of custom IC/ASIC solutions, contributing to system architectural decisions and ensuring alignment with system-level requirements.
Research, evaluate, and define communication receiver and transmitter architectures, including Zero-IF, Low-IF/NZ-IF, Superheterodyne, and other relevant architectures, based on system requirements and product constraints.
Perform system-level RF and Analog analysis, including noise budget, link budget, dynamic range, sensitivity, linearity, distortion, interference, and overall communication-channel performance.
Develop simulation models and methodologies to evaluate communication-channel performance and validate architectural and design decisions prior to hardware implementation.
Design and specify the Analog transmitter and receiver signal paths, including filtering, amplification, gain stages, matching networks.
Analyse and optimize antenna design and RF performance, including antenna matching, efficiency, radiation characteristics, impedance, and interaction with the capsule and surrounding biological environment.
Drive a system on chip designs from proof-of-concept and laboratory prototypes into production-ready medical devices.
דרישות:
BSc \ MSc in Electrical Engineering.
7+ years of hands-on experience in very Low power Analog and RF engineering, preferably in wireless communication systems, RFICs, or mixed-signal systems; Familiarity with SoC/mixed-signal architecture, including considerations for integrating analog, RF, digital, and power-management functions.
Strong understanding of RF and analog communication architectures, including Zero-IF, Low-IF/NZ-IF, Superheterodyne, and related receiver/transmitter architectures; Proven experience with analog/RF transmitter and receiver design, including filters, amplifiers, LNAs, PAs, mixers, matching networks, and signal-conditioning circuits; Strong understanding of PCB-level RF implementation, including layout, grounding, shielding, power integrity, signal integrity, and RF isolation.
Preferred Qualifications:
Experience in writing design and technical specifications.#EN המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8862957
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05/10/2026
Location: Ahihud and Karmiel
Job Type: Full Time
Semi Conductor Devices (SCD), a leading worldwide supplier of high-end Infrared Detectors and thermal imaging cores, is looking for an Analog / Mixed-Signal VLSI Designer to join its VLSI R&D group. The role involves design and validation of custom analog and mixed-signal ASICs (ROICs) for advanced IR imaging systems, working closely with experienced analog, digital, system, and hardware teams.
Responsibilities:
Design and verify Analog and Mixed-Signal circuit blocks for IR image sensors (ROICs) under the guidance of senior designers Participate in the full ASIC development flow: specification review circuit design verification integration silicon bring-up lab validation Contribute to block-level simulations, documentation, and design reviews Work closely with digital designers, layout engineers, electronics, and system teams to support chip integration Support post-silicon validation and lab measurements, including debug and correlation to simulations Gain exposure to advanced CMOS processes, image sensor architectures, and system -driven design constraints.
Requirements:
Basic requirements BSc / MSc in Electrical Engineering.
2-5 years of hands-on experience in analog or mixed-signal VLSI design (industry or advanced academic work).
Basic understanding of analog design fundamentals: gain, bandwidth, noise, stability, matching, PVT effects.
Experience reading and working from specification documents.
Familiarity with analog simulation and schematic tools (e.g., Cadence Virtuoso / ADE / Spectre).
Ability to work well in a team-oriented, multidisciplinary environment Good written and spoken English.
Advantages:
Experience with image sensors, ROICs, or custom mixed-signal ASICs. Design experience with one or more of the following:
o Analog front-ends, amplifiers, bias circuits.
o ADCs or data converters o Low-noise and/or low-power analog design. Exposure to silicon bring-up and lab validation.
Strong motivation to learn, take responsibility, and grow as an analog designer.
Location: Near Karmiel.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8793574
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26/10/2026
Location: Hod Hasharon
Job Type: Full Time and Hybrid work
Required Analog Design Engineer
Job Location:
Israel, Hod HaSharon (Hybrid)
Job Brief:
Be part of the team that is responsible for developing and optimizing the state-of-the-art analog circuits that power our embedded ReRAM and mixed-signal products.
Job Description:
In this role, you will take the lead on designing high-performance analog circuits, driving innovation in mixed-signal systems from concept through production. Youll partner closely with digital design, system architecture, and process engineering teams, playing a key role in bringing our next generation of memory products to market:
Design and develop complex analog circuits, including amplifiers, complex memory arrays, and LDOs, ensuring reliability and performance
Collaborate with cross-functional teams to define system specifications and architecture, translating requirements into actionable designs
Conduct thorough simulations and analyses to validate designs, using tools such as Cadence Virtuoso and Siemens Solido while identifying and mitigating risks early in the design process
Oversee the transition of designs from prototype to production, ensuring compliance with quality and industry standards
Apply deep expertise in analog circuit design - including amplifiers, voltage references, comparators, and ADCs/DACs - to push the boundaries of performance.
Requirements:
Required Skills and Experience:
Bachelors or Masters degree in Electrical Engineering or a related field
6+ years of experience in analog circuit design, with a proven track record of successful product launches
Strong knowledge of analog design principles and methodologies, including feedback systems and signal integrity
Proficiency in industry-standard design and simulation tools
Experience with CMOS technology, 90nm-16nm
Familiarity with mixed-signal design and signal processing concepts
Strong communication skills, with the ability to convey complex concepts to diverse audiences
Proven ability to work collaboratively in a team-oriented environment while also excelling in independent projects
A proactive and innovative mindset, eager to push the boundaries of technology
Nice to have:
Ability to model circuits using VerilogA or SystemVerilog
Familiarity with sign-off simulations (IR/EM)
Hands-on experience with layout tools
Understanding of manufacturing processes and testing methodologies related to analog circuits.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8872904
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04/11/2026
Location: Petah Tikva
Job Type: Full Time and Internship
The Power Design team is responsible for driving power efficiency throughout the chip design lifecycle, from early architecture and RTL through physical implementation and final signoff.
The team develops and owns the methodologies, tools, and flows used to estimate, analyze, track, and optimize chip power. We work closely with architecture, RTL, verification, and physical design teams to identify power challenges early, understand their root causes, and drive effective solutions while balancing power, performance, and area (PPA).
Our work includes developing power models and estimation capabilities, analyzing power at different stages of the design flow, identifying optimization opportunities, and driving improvements at both the RTL and physical design levels. The team also explores new automation and AI-based methodologies to make power analysis faster, more accurate, and more actionable.
As the chips power center of expertise, the team provides technical guidance, establishes best practices, tracks power targets, and drives power-related activities across the broader chip design organization.
What You Can Expect

Ramp up on chip power estimation methodologies, tools, and power calculators.

Perform power analysis and identify optimization opportunities throughout the chip design lifecycle.

Explore and implement power optimizations at both the RTL and physical design levels.

Develop automation and improve existing power analysis and estimation flows.

Explore the use of AI tools for power analysis, optimization, and design-flow automation.

Analyze power trends and identify high-impact areas for improvement.

Collaborate with RTL, physical design, architecture, and power teams to drive power-related activities.

Gradually become a power focal point within the chip design team, building expertise and ownership of power methodologies, analysis, and optimization.
Requirements:
To be successful in this role, you must:
- at least 2nd year student for Electrical Engineering, Computer Engineering, Computer Science, or similar field.
- Have coursework relating to foundational principles of circuit design, circuit theory, digital logic design, or electronics.
- Work well on a team and be prepared to share your knowledge with others.
- Be ready to take your work and any issues you faced or successes you had and develop that into a short PowerPoint presentation featuring key highlights to share with your team.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8885841
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff ChipDev Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will have the opportunity to find the perfect blend of software design practices and hardware development complexity. You will be a hardware engineer with software proficiency.
Responsibilities
Work with partner teams to provide the compute, storage and methodology needs of the chip design, verification and physical design teams.
Collaborate with application-specific integrated circuit (ASIC) teams to implement tools and methodologies.
Design and implement CAD tools, solutions and methodologies for ASIC development.
Create software solutions that improve the hardware design process through automation.
Propose, design and implement software automation that directly addresses bottlenecks in today's ASIC and SoC EDA flow.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Science, or equivalent practical experience.
12 years of experience in software development using various programming languages, algorithms, and data structures.
5 years of experience creating developer tools (such as automated systems or compilers) to enhance code health, quality, and velocity.
3 years of experience in a technical leadership role.
Preferred qualifications:
Experience with ASIC design, debug, and verification flows.
Experience evaluating multiple vendor solutions and driving tool decisions/design improvements.
Experience with design verification techniques, including constrained-random simulation, formal property verification, or static verification.
Experience working with register-transfer level (RTL) teams and design integration methodologies that improve team productivity and velocity.
Experience with software architectural elements across domains, including CAD, physical design, architecture, digital design, silicon validation, and design verification.
Ability to resolve complex, ambiguous problems that do not have established precedents.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8847227
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Location: Herzliya and Haifa
Job Type: Full Time
As an Analog Layout Automation Engineer, youll convert design concepts into silicon by collaborating with circuit designers and using advanced, including AI-powered, CAD tools to create high-performance analog and mixed-signal layouts. You will review floor plans, analyze circuits, run verification suites, and resolve LVS/DRC/ERC issues to deliver next-generation SOCs. Youll also drive automation by developing scripts, improving workflows, and applying AI/ML for layout optimization, verification acceleration, advanced modeling, intelligent quality metrics, reduced manual effort, and data-driven design insights.
Requirements:
Minimum Qualifications
BS degree in technical discipline with minimum 10 years of relevant experience.

Preferred Qualifications
Experience designing analog and mixed-signal layouts in deep-submicron CMOS and FinFET technologies.
Strong programming/scripting skills in SKILL, Perl, TCL, Shell, and/or Python, with emphasis on layout automation, productivity tooling, and data analysis.
Solid understanding of supervised and self-supervised learning, convolutional neural networks (CNNs), and core training concepts such as loss functions, backpropagation, and optimization.
Hands-on experience with PyTorch for model development and experimentation.
Demonstrated ability to automate layout tasks, flows, and quality checks using scripting and CAD tools.
Proven record in implementing high-quality analog layouts with tight device matching, low noise, and low power consumption.
Familiarity with failure-prone circuit/layout structures, analog and DFM best practices, and the ability to diagnose and resolve layout-related issues.
Strong proficiency in custom and standard-cell floor planning, hierarchical layout assembly, and physical integration.
Understanding of image processing fundamentals, spatial representations, multi-channel image handling, segmentation, and object detection concepts.
Technical understanding of IR drop, RC delay, electromigration, self-heating, coupling capacitance, and related reliability concerns.
High proficiency in interpreting physical verification reports, including DRC, ERC, and LVS.
Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and familiarity with Cadence Innovus.
Experience with CAD automation workflows and PCell creation.
Excellent communication skills and the ability to work effectively with cross-functional teams.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8847766
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
Required ASIC Design Verification Engineer, Digital Signal Processing
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will define and execute the verification strategy for high-speed Physical Layer (PHY) digital blocks. This role focuses on the functional and mathematical verification of complex DSP algorithms, digital-analog boundaries, and signal processing logic. This position requires a strong technical foundation in communication theory, fixed-point arithmetic, and mixed-signal co-simulation.
Responsibilities
Verify RTL implementations against high-level architectural reference models (MATLAB, C++, or SystemC) using bit-exact and fixed-point verification methodologies.
Verify the stability, tracking capability, and convergence of adaptive equalization loops (FFE, DFE) and timing recovery systems under varying channel impairments.
Model and verify the functional interface between Digital DSP blocks and the Analog Front End (AFE) using Real Number Modeling (RNM) or SystemVerilog-AMS.
Design, implement, and maintain scalable UVM-based simulation environments, SystemVerilog Assertions (SVA), and functional coverage metrics for digital signal processing blocks.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
8 years of experience in design verification (DV) with a focus on digital signal processing (DSP), communication systems, or arithmetic logic blocks.
Experience with scripting in Python, Perl, or Makefile for automation.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.
Experience with Mixed-Signal verification techniques such as Real Number Modeling (RNM, SystemVerilog-Wreal) or SystemVerilog-AMS.
Functional knowledge of adaptive equalization architectures (FFE/DFE) and timing recovery loops.
Programming proficiency in Python, MATLAB, or C/C++ for testbench automation and reference modeling.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8844808
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design AI Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead an edge AI IP design team including definition, implementation and deployment, and define IP development methodologies sharing unified blocks within the IP design team.
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
Perform RTL development (e.g., coding and debug in SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Collaborate closely with software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
10 years of experience in design from microarchitecture through implementation using Verilog/SystemVerilog.
4 years of experience in managing teams and groups.
Experience working with system design principles for low latency, high throughput, security, and reliability.
Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Master's degree or PhD in Engineering or equivalent practical experience.
Experience in micro-architecture and design of complex AI modules, optimizing their power, performance and area.
Experience in leading chip development projects and teams, and execution.
Ability to motivate and focus on collaborative teams to achieve testing goals.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8843836
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Responsibilities:
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
8 years of experience in technical leadership.
Experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Experience developing RTL for ASIC subsystems.
Preferred qualifications:
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in TCP, IP, Ethernet, PCIE and DRAM including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8846925
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Chip Architect, Cloud, Silicon
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As an SoC Chip Architect, you will lead the definition of groundbreaking, high-performance custom silicon and multi-chiplet systems for our Cloud AI infrastructure. You will bridge the gap between hyperscale data center workload requirements and silicon implementation across various domains, collaborating with cross-functional partners to design scalable, energy-efficient, and feature-rich SoCs.
You will be part of a team pushing the boundaries of custom silicon engineering, architecting next-generation data center products that deliver industry-leading performance, low latency, and massive bandwidth for Cloud and our flagship AI services.
Responsibilities
Lead top-level SoC architecture across multiple disciplines, including IP architects, digital design, verification, physical design, validation, firmware, power management, security, and system software.
Architect and analyze complex multi-chiplet systems, including chip partitioning, die-to-die (D2D) interconnects, advanced packaging constraints, and high-performance on-chip fabrics (NoC).
Define top-level SoC subsystems, memory hierarchies, clock distribution, reset schemes, and power domains to ensure optimal system performance and operational efficiency.
Formulate end-to-end operational flows, latency models, and system throughput analyses for data center workloads.
Own the SoC architecture specification and lead it throughout the complete product life-cycle: concept, modeling, implementation, tape-out, and post-silicon bring-up.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
15 years of experience leading the architectural definition of high-performance SoCs, ASICs, or multi-chiplet systems from concept through production.
Experience architecting SoC interconnects, memory hierarchies, and system-level fabrics.
Experience writing, owning and maintaining comprehensive SoC architecture specifications.
Experience working across hardware, firmware, and system software boundaries with system-level reasoning.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering or Computer Engineering.
Experience with AI workload analysis, their mapping across different data center system components, and optimizing hardware solutions to better serve them.
Experience scaling and optimizing high-performance AI accelerators, compute chiplets, or IO Hub SoCs for data center/cloud deployments.
Proven track record of architecting multi-chiplet systems utilizing cutting-edge silicon process technology and advanced packaging (2.5D/3D, D2D interfaces such as UCIe, BoW, or high-speed SerDes).
This position is open to all candidates.
 
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03/11/2026
Location: Yokne'Am Illit
Job Type: Full Time
our chip design group is looking for best-in-class Verification engineers to join our outstanding silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.
what you'll be doing:
verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.
daily work involves acquaintance with all aspects of chip development: design, micro- architecture, firmware, production, and verification.
engage in cutting-edge pcie generation working on latest pcie gen7.
Requirements:
what we need to see:
b.sc./ m.sc. in computer engineering/electrical engineering/communication engineering or equivalent experience.
4+ years of experience in verification.
high level of english.
high motivation to grow and excel.
ways to stand out from the crowd:
knowledge in pci express standard.
validated experience in verification or rtl frontend asic design (chip design).
background in Specman / uvm.
background in rtl uarch & coding.
we have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. if you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. we are committed to fostering a diverse work environment and proud to be an equal opportunity employer. as we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
This position is open to all candidates.
 
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03/11/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a best-in-class chip design Verification engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices and delivering the highest throughput and lowest latency! join us to play a key role in verifying our groundbreaking, innovative chips, and work in a meaningful, growing, highly professional environment where you can make a huge impact at a technology-focused company.
what you'll be doing:
work on a design and verification team developing the Front-End design for the switch silicon.
develop verification components and reference models, and verify and simulate chip blocks to specifications under challenging constraints, with a strong focus on power, area, and performance.
work closely with multiple teams within organizations such as architecture, micro- architecture and fw.
Requirements:
what we need to see:
electrical engineering b.sc., computer engineering, or another relevant engineering discipline, with high scores, or equivalent experience.
completion of programming or logic design courses with high scores.
4+ years of experience in asic or sw verification.
software/ firmware development with orientation toward rtl is also relevant.
a team player with good communication and interpersonal skills.
we have some of the most forward-thinking and hardworking people in the world working for us. are you creative and autonomous? do you love the challenge of crafting the highest performance & lowest power silicon possible? if so, we want to hear from you. come, join our switch silicon design team, and help us build the next chip in this exciting and quickly growing field.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Micro-Architect, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Lead Design Activities at IPs, SubSystems(S.S) and SoC.
Define the block-level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up, as well as test plan development and coverage analysis for block and SOC-level verification.
Communicate and collaborate with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related technical field, or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production or equivalent experience.
4 years of experience in technical leadership.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Experience in micro-architecture, RTL Design, verification, design quality checks, physical design aspects of RTL coding, and power.

Preferred qualifications:
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking: RDMA or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience working with software teams optimizing the hardware/software interface.
Proficiency in a procedural programming language (e.g., C++, Python, Go).
Knowledge of TCP, IP, Ethernet, PCIE and DRAM.
Familiarity with Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Herzliya
Job Type: Full Time
Join our team in a pivotal role where you'll own the entire IP-level netlist generation and timing convergence journey from synthesis to sign-off.
You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing constraints for both standard and complex custom designs that ensure sign-off quality from day one.
Working at the intersection of multiple disciplines, you'll partner closely with RTL designers to deeply understand design intent and clock architecture, collaborate with CAD teams to shape and optimize cutting-edge flows, and team with Physical Design engineers to achieve flawless timing sign-off.
We're seeking an innovative thinker who brings fresh perspectives to timing analysis methodologies and proactively identifies and resolves timing challenges to eliminate pessimism and accelerate convergence, ultimately making their mark on next-generation chip design.
Requirements:
Minimum Qualifications
Bsc/Msc in Electrical Engineering
5+ years of experience in the field
At least 2+ years of experience in writing ASIC timing constraints and achieving timing closure
Expertise in STA tools (Primetime) and flow generation
Knowledge of the ASIC design timing closure flow and methodology
Preferred Qualifications
Understanding of timing corners/modes
Familiarity with process variations and signal integrity-related issues
Hands-on experience in generating and managing timing/SDC constraints, proficient in scripting languages (Tcl and Perl)
Knowledge of synthesis, DFT, and backend-related methodologies and tools
Strong communication skills are required, as you will interact with various groups
This position is open to all candidates.
 
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