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we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites - one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within our company spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are looking for a seasoned Electronics Engineer with over 5 years of hands-on experience in analog circuit design and power supply engineering. In this role, you will focus on developing and refining analog circuits-such as amplifiers, filters, and DACs operating from DC to 2GHz-and power supply solutions across various topologies. As the go-to person in electronics, youll work as a key contributor and technical expert, collaborating closely with our hardware teams in Denmark and Israel, as well as operations during the NPI phase.
Key Responsibilities
Analog Circuit Development:
Design and optimize analog circuitry, including op-amps, filters, and signal generation modules (DACs) covering frequencies from DC up to 2GHz and above.
Power Supply Engineering:
Develop robust power supply designs across various schemes (buck/boost converters, LDOs, switching regulators, etc.) that meet high-performance standards.
Lab and debug experience:
Experience in working in labs, measuring and debugging electronics.
Simulation & Design:
Utilize Altium for PCB design and LTspice for circuit simulation to validate and refine your designs.
Design for Manufacturing & Test (DFM/DFT):
Incorporate DFM and DFT best practices to ensure reliability, manufacturability, and scalability across many channels in compact form factors.
Performance & Compliance:
Ensure designs meet stringent low-noise requirements and EMI/EMC compliance for high-performance applications.
Cross-Functional Collaboration:
Work closely with hardware teams in both Denmark and Israel, and engage with operations during the NPI process to ensure seamless integration of your designs.
Technical Expertise:
Act as the electronics subject matter expert within the team, providing technical sparring and review to peers.

We are now looking for a Chip Design Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Micro-architecture for RTL and simulation environment planning for units and modules.
Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify, and simulate chip blocks/entities according to specifications.
RTL synthesis, timing, supporting verification, and silicon post TO activities.
Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.

We are now looking for a Chip Design Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Micro-architecture for RTL and simulation environment planning for units and modules.
Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify, and simulate chip blocks/entities according to specifications.
RTL synthesis, timing, supporting verification, and silicon post TO activities.
Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.

Our Chip Design team is growing! Join our high-end product design team and help shape the next generation of advanced semiconductor solutions. About us our company  has been delivering tens of millions of chips annually to leading tier-1 customers in the Security, Cloud, and Computing domains. We specialize in semi-custom, high-quality solutions, going above and beyond to meet our customers needs. Our Israel Design Center is fully self-contained, covering everything from product definition and architecture to design, software, validation, and TEST - meaning real ownership and no daily late-night calls across time zones We also pride ourselves on a warm, open culture where everyone knows each other, and every engineer can clearly see the impact of their work on the final silicon. We are looking for experienced Chip Design Engineers to join our team and take a key role in RTL design, new IP development, and SOC integration As part of the design team, you will be deeply involved in architectural exploration, protocol evaluation, and hands-on design work across multiple chip blocks. Responsibilities
* RTL design and implementation of new IPs
*  SOC integration and design ownership of chip subsystems
* Exploration and evaluation of new protocols and architectural solutions
* Close collaboration with architecture, verification, validation, software, and back-end teams
* Delivering high-quality, best-in-class RTL that meets performance, power, and area goals Why Join Us?
* Work on cutting-edge, high-volume silicon products
* Real impact on end-to-end chip development
* Collaborative environment with strong technical ownership
* A stable yet agile organization with a human, people-first culture

we are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.
Chip level integrations and connectivity.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include our companyrs, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Develop and optimize the overall layout of the chip, including partitioning, macro and IP placement, and pin placement.
Design and implement efficient power delivery networks power grids to ensure stable power to all parts of the chip.
Develop and validate high-performance, low-power clock networks (e.g., Clock Tree Synthesis (CTS)) to ensure proper synchronization across the entire chip.
Develop, enhance, and maintain custom scripts (e.g., Tcl, Perl, Python) for automation and improved efficiency.
Conduct extensive Design Rule Checks (DRC) to ensure the layout adheres to manufacturing rules, performing Layout Versus Schematic (LVS) checks to verify that the physical layout matches the logical design.

We are looking for Analog Layout Engineer
Roles and responsibilities
Layout design of sensitive analog circuits where you will need to bring state-of-the-art solutions.
In close co-operation with the Circuit Designer, review and analyze complex analog schematics for layout implementation.
Ensures layout designs best functionality and quality by performing all relevant checks like parasitic checks, IR drop and Electromigration, noise and DFM.
Perform post-layout iterations to ensure the best results.

our company Mixed-Signal CAD team is looking for an Analog / Mixed-Signal CAD Engineer someone who is excited to join a growing group of diverse individuals responsible for handling challenges in the scope of high-speed mixed-signal circuit and mask designers
our company has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.
What you'll be doing:
Support and develop solutions that will improve the efficiency and quality of the Mixed-Signal group.
Define, develop, and maintain in-house, along with industrial utilities, solutions for Schematic, Layout, Package and Physical-verification in the fields of costume and EDA vendor tools (Cadence Virtuoso, Mentor Calibre, Synopsys ICV and more), environment, and general-purpose solutions.
Write, customize and debug ICV/Calibre runsets of DRC, LVS, EXT.
SKILL coding including Pcells development.
Scripting and programing for ad-hoc solutions and wide tasks solutions.
Work closely with our companys world-wide Mixed-signal and Technology teams.

We are now looking for best-in-class Senior Chip Design Verification Engineer to join our outstanding Network Adapter Silicon group, developing the industry's best high-speed smart communication devices, Data Processing Unit (DPU), delivering the highest throughput and lowest latency! Come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you'll be doing:
Work in a verification team which develops some of the Networking silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.
Gain a strong understanding of chip Micro-Architecture and features, and develop the verification environments.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are looking for a Photonics Layout Engineer to join our integrated photonics design team - This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design.

In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules. You will work closely with device designers, process engineers, and tape-out teams to deliver high-quality layouts of silicon photonics PICs.

Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software.

Understanding of photonic components, waveguide routing and automated layout generation is a major advantage.

You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.

Responsibilities:

Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software.

Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.).

Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths.

Verify layouts using DRC, and LVS to ensure compliance with foundry requirements.

Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts.

Optimize layouts for performance, yield, and compactness while adhering to technology constraints.

Participate in photonic design automation tool development and workflow improvements.

Prepare and manage data for tape-out and support mask review processes.

Debug layout and rule-check issues and propose corrective actions.

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are now looking for a Senior Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

We are now looking for a Senior verification technical lead for our FC Switch Silicon team. As a FullChip verification technical lead Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a FC verification team within the Switch silicon.
Dynamic verification environments planning for units infrastructures and system level
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW
Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.

we are looking for a Electrical Post Silicon Validation HW Engineer.
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
* Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
* Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
* Handle all chip validation aspects, including:
* Building validation plans.
* Performing EPSV using advanced test and measurement equipment.
* Writing tests in Python over device SDK.
* Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

Were looking for a talented Post Silicon Lead to join our IC group.
Responsibilities:
Lead and manage the post-silicon activities for Arbes mixed-signal and RFIC chipset (with emphasis on mixed-signal).
Take part in the definition and productization of radar chips.
Support and validation of bring-up activities (first bring-up, characterization, reliability, testability) for mixed-signal and RFICs.
Drive chip testing infrastructure including tools, equipment, and test code.
Work closely with the manufacturing and OSAT test teams.
Collaborate with other R&D teams from the architecture phase through production.