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We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are looking for a passionate, modern software engineer or junior architect early in their career. The role involves developing and prototyping new scalable training and inference advancements using our Spectrum-X AI fabric.

This role offers a rare opportunity to work on innovative AI and networking technologies, building prototypes that influence the development of large-scale AI systems. You will help improve AI application-network interaction by refining communication, crafting congestion control, contributing to NIC and switch capabilities, and enhancing AI factory performance at scale.


What youll be doing:

Prototype end-to-end solutions to improve distributed training and disaggregated inference performance.

Analyze and optimize communication flows across application, transport, and network layers.

Develop system software spanning communication libraries, drivers, and firmware integrations.

Collaborate with hardware, firmware, and SDK teams to co-design network features.

Validate and integrate prototypes into our AI infrastructure and products.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

We are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.

What you'll be doing:

Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.

Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.

Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.

Balance innovation with hands-on engagement in daily DV issues - keeping a strong connection to real-world challenges and support needs.

Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of NVIDIAs industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.

We are seeking a dedicated NVLink Firmware Architect to join our esteemed engineering team in Israel. This is an outstanding opportunity to impact the future of data centers and networking technology. As a key member of our team, you will play a crucial role in developing and crafting our NVLink firmware stack and GPU scale-up networking. Our collaborative environment, combined with ambitious goals, will enable you to collaborate closely with ASIC and software architecture/design teams to pioneer innovative solutions.

What you'll be doing:

Collaborating with a team of innovative engineers to craft new networking applications that address sophisticated problems in groundbreaking ways.

Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architects.

We are now looking for a Chip Design Verification Engineer. We are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

Were looking for a talented and driven Integration Team Lead to join our System Engineering group. In this role, youll lead the integration team, working closely with system engineers, V&V, and other R&D functions to bring cutting-edge technologies into reality.
Responsibilities
Lead and manage the integration team, including task planning, setting priorities and mentoring team members
Be the technical focal point for integration-related activities
Oversee system testing and manage the handover process from Integration to V&V
Lead system bring up activities
Responsible for troubleshooting efforts and resolving problems in a timely manner
Maintain a broad understanding of the entire system and stay up to date with the latest version
Lead by example, motivate, empower and develop team members to reach their full potential
Establish strong working relationships with System Engineering and V&V teams to ensure high-quality delivery
Collaborate closely with multiple cross-functional teams across the organization.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Lead the end-to-end execution, tracking, and convergence of chip-level CDC and RDC for complex SoCs across all IPs and partitions.

Plan and orchestrate CDC/RDC signoff: define methodology, scopes, run plans, constraints, and acceptance criteria.

Run and maintain CDC/RDC flows and rule decks, including multi-mode, multi-clock, and hierarchical signoff.

Triage violations efficiently: root-cause to RTL, constraints, tool setup, or IP models; prioritize and drive fixes to closure with owners.

Verify reset architecture and RDC robustness (reset domain intent, release sequencing, glitch detection, fanout).

Author and review CDC/RDC constraints, waivers, and justifications; ensure auditability and signoff quality.

Automate runs, report parsing, dashboards, and KPIs for closure tracking using scripting and data tooling.

Partner with RTL, DV, DFT, STA, PD, and Architecture to align fixes, manage ECOs, and protect CDC/RDC quality during late design changes.

Define and enforce signoff gates; communicate progress and risks with clear metrics and issue tracking.

Continually improve methodology and training to prevent recurring CDC/RDC issues and accelerate convergence.

We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.

What you'll be doing:

Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.

Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.

Define the implementation of debug capabilities to support performance validation and improvements

Understand our system requirement and help define the POR of our switch product line.

Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.

Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.

Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

We are looking for a 100% hands-on Storage Services Software engineer to join the block storage group. You will be a member of a team that builds the next generation block storage capabilities. You will work closely with a variety of teams and architects including the networking team, and external customers. You will take part in defining the software architecture and implementation of the most advanced storage services! Services that will need to meet extreme performance and scalability demands! We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow.

We work, think and learn as a team. We thrive in a deeply strong environment, and we're passionate about a culture that demands innovation and the highest standards. The rewards are sweet and include collaborating with some of the smartest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to work on products that transform the way people work and play.

What youll be doing:

100% hands-on coding role in C language, kernel and userspace.

Research, design, implement and test, new and existing, networking features for distributed storage services and features of our block storage solution, in both Host and DPU environments.

Acquire understanding of the algorithms, the technicalities and the interaction with other components across our block storage ecosystem.

Analyze and solve challenging bugs and customer cases in large scale production systems, identifying issues in our or inbox kernel modules and often in other components. Drive new solutions based on any issues that arise.

We are searching for a forward-thinking Software Engineer to join our VLSI Design Automation Infrastructure team. We are looking for a candidate who looks beyond traditional scripting and is eager to leverage Artificial Intelligence and Machine Learning to revolutionize how we build chips.

In this role, you will manage high-performance compute and storage environments while pioneering the integration of AI-driven tools into our workflows. You wont just maintain the infrastructure; you will modernize it-using LLMs to optimize code, ML to predict compute bottlenecks, and intelligent automation to streamline the backend networking team's success.

What youll be doing:

AI-Driven Optimization: Leverage AI/ML methodologies to analyze compute and storage patterns, predicting resource needs and optimizing LSF grid performance.

Next-Gen Tooling: Design and develop intelligent scripts and automation tools, integrating Generative AI (LLMs) to accelerate debugging and workflow generation.

Infrastructure Management: oversee complex On-Prem environments (LSF) and storage solutions, ensuring maximum uptime for critical VLSI projects.

Data Visualization: Build dynamic, data-driven dashboards that not only report status but utilize analytics to provide actionable insights on infrastructure health.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

Our networking VLSI team is looking for a CAD engineering manager. The team is providing methodologies and vendor-based EDA flows for the physical design execution teams. Your team will be responsible for defining and developing methodologies and flows that enable high quality and super-efficient execution of over a hundred physical design engineers. You will be working closely with the physical design technology team, with design engineering professionals and project leads, and with peer software/CAD teams, hence you will need to possess strong interpersonal skills, be a quick learner, and manage multiple missions in a results-oriented manner. You, along with the team, will lead processes from requirements understanding, through software definition and implementation of tools/flows, ending with release, integration and support.

What you'll be doing:

Lead a growing team of ~5 professional CAD engineers.

Own the definition, development, and maintenance of software solutions for physical design engineering.

Collaborate and closely interact with design technology experts and execution engineers, along with software/CAD peers.

Influence and make right choices to produce high quality and tangible impact.

Be agile and make continuous and incremental progress by decomposing the problem in to smaller and achievable goals.

Define and build strategic vision for the networking VLSI technology and EDA team.